公开(公告)号：US5996026A

公开(公告)日：1999-11-30

申请号：US833349

申请日：1997-04-04

申请人： Osamu Onodera ,  Makiko Shinohara ,  Kiichi Sato

发明人： Osamu Onodera ,  Makiko Shinohara ,  Kiichi Sato

IPC分类号： G06F13/12 ,  G06F7/04 ,  G06F9/00

CPC分类号： G06F13/122 ,  Y10S707/99931

摘要： A connection method of a plurality of input/output channels between a plurality of sub-channels of an information processing system having a virtual machine running on a physical machine under control of a hypervisor and a plurality of devices. The method includes issuing from the hypervisor a command for setting configuration information defining a plurality of configuration structures between the sub-channels set for the respective virtual machines and the devices in a storage device and acquiring configuration information containing the sub-channel corresponding to a designated device from the configuration information corresponding to one of the virtual machines based on the device designation contained in the input/output command from the one virtual machine. The virtual machines are enabled after the issuance of the set command and before the issuance of the input/output command. The corresponding configuration information is searched by using ID information of the virtual machine which issued the input/output command in order to execute the step so that one of a plurality of channel paths between a plurality of devices and the sub-channels is selected to execute the input/output designated by the input/output command.

摘要翻译： 信息处理系统的多个子信道之间的多个输入/输出信道的连接方法，具有在管理程序的控制下在物理机上运行的虚拟机和多个设备。 该方法包括从管理程序发出用于设置在针对各个虚拟机设置的子信道和存储装置中的设备之间定义多个配置结构的配置信息的命令，并且获取包含与指定的对应的子信道的配置信息 设备根据来自一个虚拟机的输入/输出命令中包含的设备指定从与虚拟机之一相对应的配置信息。 虚拟机在发出设置命令之后以及发出输入/输出命令之前启用。 通过使用发出输入/输出命令的虚拟机的ID信息来搜索相应的配置信息，以执行该步骤，使得选择多个设备和子信道之间的多个信道路径中的一个来执行 由输入/输出指令指定的输入/输出。

公开(公告)号：US5898855A

公开(公告)日：1999-04-27

申请号：US309407

申请日：1994-09-20

申请人： Osamu Onodera ,  Ken Uehara

发明人： Osamu Onodera ,  Ken Uehara

IPC分类号： G06F9/46 ,  G06F9/48 ,  G06F9/40

CPC分类号： G06F9/4843

摘要： A virtual machine system capable of considerably improving its performance by preventing a variation of time slice values of logical processors and strictly ensuring the concurrent running of a plurality of logical processors belonging to the same virtual machine, in the configuration and management of virtual machines of a multi-processor structure having a plurality of logical processors. A method of controlling a virtual machine running time in the virtual machine system includes collectively storing time slice values of logical processors in a virtual machine to which the logical processors belong, and making a virtual machine control program for supervising and controlling the logical processors to store and manage the time slice values.

摘要翻译： 一种虚拟机系统，其能够通过防止逻辑处理器的时间片段的变化并且严格确保属于同一虚拟机的多个逻辑处理器的并行运行来显着提高其性能，在虚拟机的配置和管理中 多处理器结构具有多个逻辑处理器。 一种在虚拟机系统中控制虚拟机运行时间的方法包括将逻辑处理器的时间片集合存储在逻辑处理器所属的虚拟机中，并且制作用于监视和控制逻辑处理器以存储的虚拟机控制程序 并管理时间片的值。

公开(公告)号：US5845146A

公开(公告)日：1998-12-01

申请号：US670316

申请日：1996-09-05

申请人： Osamu Onodera

发明人： Osamu Onodera

IPC分类号： G06F13/10 ,  G06F13/12 ,  G06F13/14 ,  G06F9/00

CPC分类号： G06F13/122

摘要： An extending system in an information processing system which includes an input/output channel and operates a plurality of virtual computers. A plurality of input/output processing units are included in the input/output channel and each virtual computer issues a region ID and a channel path ID. A channel path reconfiguration array is provided having a plurality of channel path reconfiguration array blocks corresponding to region IDs. Each channel path reconfiguration array block includes a plurality of channel path reconfiguration array entries corresponding to channel path IDs and each channel path reconfiguration array entry includes an input/output processing unit number and a channel path ID. A selector is provided for selecting a channel path reconfiguration array block corresponding to the region ID issued by a virtual computer and selecting a channel path reconfiguration array entry corresponding to channel path ID issued by the virtual computer within the selected channel path reconfiguration array block. The virtual computer selects one of the input/output processing units corresponding to the input/output processing number from the selected channel path reconfiguration array entry and accesses the input/output processing circuit using the channel path ID from the selected channel path reconfiguration array entry.

摘要翻译： 一种信息处理系统中的扩展系统，其包括输入/​​输出通道并操作多个虚拟计算机。 多个输入/输出处理单元包括在输入/输出通道中，并且每个虚拟计算机发出区域ID和通道路径ID。 提供了具有对应于区域ID的多个信道路径重配置阵列块的信道路径重配置阵列。 每个信道路径重配置阵列块包括对应于信道路径ID的多个信道路径重新配置阵列条目，并且每个信道路径重新配置阵列条目包括输入/​​输出处理单元号和信道路径ID。 提供选择器，用于选择与由虚拟计算机发出的区域ID相对应的信道路径重新配置阵列块，并且选择与所选择的信道路径重新配置阵列块内的虚拟计算机发出的信道路径ID相对应的信道路径重配置阵列条目。 虚拟计算机从所选择的信道路径重新配置阵列条目中选择与输入/输出处理号码相对应的输入/输出处理单元中的一个，并使用来自所选择的信道路径重配置阵列条目的信道路径ID访问输入/输出处理电路。

公开(公告)号：US5592638A

公开(公告)日：1997-01-07

申请号：US090953

申请日：1993-07-13

申请人： Osamu Onodera

发明人： Osamu Onodera

IPC分类号： G06F9/46 ,  G06F12/02 ,  G06F12/08

CPC分类号： G06F12/0223

摘要： When virtual machines are activated under a condition in which an assignment request having a storage extent and a storage region origin is designated and an assignment request having only the storage extent designated are mixedly present, the logical partion (LPAR) whose storage origin is designated by flags is regarded as already assigned even when the storage region is not actually assigned, and a work table indicative of the current status of the storage assignment is generated in a not-in-use storage region table. The not-in-use storage region table is generated on the basis of the work table to determine the assignment or non-assignment of the LPAR to be activated, and assignment or non-assignment of a plurality of such not-in-use regions can be judged in an ascending order.

摘要翻译： 当虚拟机在具有存储范围和存储区域原点的分配请求被指定并且仅具有指定的存储范围的分配请求混合地存在的条件下被激活时，其存储起点由以下指定的逻辑分区（LPAR） 即使在实际没有分配存储区域的情况下也将标志视为已经被分配，并且在未使用的存储区域表中生成表示存储分配的当前状态的工作表。 基于工作表生成未使用的存储区域表，以确定要激活的LPAR的分配或不分配，以及多个这种未使用区域的分配或不分配 可以按升序判断。

公开(公告)号：US5506975A

公开(公告)日：1996-04-09

申请号：US165916

申请日：1993-12-14

申请人： Osamu Onodera

发明人： Osamu Onodera

IPC分类号： G06F9/46 ,  G06F13/24 ,  G06F15/17 ,  G06F15/16

CPC分类号： G06F15/17 ,  G06F13/24

摘要： A virtual machine system controls the operation of a plurality of virtual machines on a single computer and permits the computer to be switched from one virtual machine to another for carrying out urgent input/output operations. The decision to switch from an operating virtual machine to one of a plurality of other non-operating virtual machines is based on examining the number of input/output interrupt conditions that occur for each virtual machine other than the running one. When the number of input/output interrupt conditions for a virtual machine other than the running one is found to exceed a predetermined threshold number, operation of the currently running virtual machine is suspended. Control of the computer is then returned to the virtual machine control system to permit execution of another virtual machine so that the input/output interrupt condition for that virtual machine can be acknowledged.

摘要翻译： 虚拟机系统控制在单个计算机上的多个虚拟机的操作，并且允许计算机从一个虚拟机切换到另一虚拟机以执行紧急输入/输出操作。 从操作虚拟机切换到多个其他非操作虚拟机之一的决定是基于检查除运行虚拟机之外的每个虚拟机发生的输入/输出中断条件的数量。 当发现超过预定阈值的虚拟机以外的虚拟机的输入/输出中断条件的数量超过预定阈值时，暂停当前运行的虚拟机的操作。 然后将计算机的控制返回到虚拟机控制系统以允许执行另一个虚拟机，以便可以确认该虚拟机的输入/输出中断条件。

公开(公告)号：US5390309A

公开(公告)日：1995-02-14

申请号：US736022

申请日：1991-07-25

申请人： Osamu Onodera

发明人： Osamu Onodera

IPC分类号： G06F9/46 ,  G06F12/10 ,  G06F12/08

CPC分类号： G06F12/109

摘要： A level-2 virtual machine is constructed under the control of a level-1 operating system (OS) operating on a real machine (level-1), and a level-3 virtual machine is constructed under the control of another operating system (OS) operating on the level-2 virtual machine. A level-3 virtual address generated in the level-3 virtual machine is translated to a level-2 virtual address, which is further translated to a level-1 virtual address. A third predetermined main storage address is added to the level-1 virtual address to generate a level-1 absolute address. The translated address is checked as to whether it is within a predetermined area on the main storage.

摘要翻译： 一级二级虚拟机由在真机（level-1）上操作的一级操作系统（OS）的控制下构建，三级虚拟机在另一操作系统（OS ）在二级虚拟机上运行。 在3级虚拟机中生成的3级虚拟地址转换为2级虚拟地址，进一步转换为1级虚拟地址。 将第三预定主存储地址添加到1级虚拟地址以生成1级绝对地址。 检查翻译的地址是否在主存储器上的预定区域内。

公开(公告)号：US09567637B2

公开(公告)日：2017-02-14

申请号：US13265074

申请日：2010-04-20

申请人： Shoji Tsuji ,  Osamu Onodera

发明人： Shoji Tsuji ,  Osamu Onodera

IPC分类号： C12Q1/68 ,  C12P19/34

CPC分类号： C12Q1/6883 ,  C12Q2600/156 ,  C12Q2600/158

摘要： The present invention provides a method of diagnosing a cerebrovascular disease in a human comprising the steps of: (a) measuring a mutation of HTRA1 gene in a test sample from said human; and (b) determining if the mutation of HTRA1 gene in said test sample correlates with a cerebrovascular disease in said human.

摘要翻译： 本发明提供了一种诊断人脑血管疾病的方法，包括以下步骤：（a）测量来自所述人的测试样品中HTRA1基因的突变; 和（b）确定所述测试样品中HTRA1基因的突变是否与所述人类的脑血管疾病相关。

公开(公告)号：US20120100536A1

公开(公告)日：2012-04-26

申请号：US13265074

申请日：2010-04-20

申请人： Shoji Tsuji ,  Osamu Onodera

发明人： Shoji Tsuji ,  Osamu Onodera

IPC分类号： C12Q1/68 ,  C07H21/02 ,  C07H21/00

CPC分类号： C12Q1/6883 ,  C12Q2600/156 ,  C12Q2600/158

摘要： The present invention provides a method of diagnosing a cerebrovascular disease in a human comprising the steps of: (a) measuring a mutation of HTRA1 gene in a test sample from said human; and (b) determining if the mutation of HTRA1 gene in said test sample correlates with a cerebrovascular disease in said human.

摘要翻译： 本发明提供了一种诊断人脑血管疾病的方法，包括以下步骤：（a）测量来自所述人的测试样品中HTRA1基因的突变; 和（b）确定所述测试样品中HTRA1基因的突变是否与所述人类的脑血管疾病相关。

公开(公告)号：US07726820B2

公开(公告)日：2010-06-01

申请号：US11440004

申请日：2006-05-25

申请人： Nobuyuki Hara ,  Shinichi Ueda ,  Makoto Nagata ,  Yoshihisa Wada ,  Dai Yoneya ,  Osamu Onodera

发明人： Nobuyuki Hara ,  Shinichi Ueda ,  Makoto Nagata ,  Yoshihisa Wada ,  Dai Yoneya ,  Osamu Onodera

IPC分类号： G03B21/14 ,  G03B21/22 ,  H04N5/64 ,  G03B21/18 ,  G03B21/26

CPC分类号： G03B21/18

摘要： A cabinet of a projection type display unit includes a base cabinet on which main component parts are mounted, and a top cover made from sheet metal which is mounted so as to cover the base cabinet, wherein a rear face portion of the top cover is formed in the shape of a curved surface being laid-down U-shaped in side view. The U-shaped curved surface is formed on an ergonomic basis, so that the rear face portion can be gripped securely even with one hand. On the back side of the top cover, bosses are integrally formed by use of a resin which is a different material from the sheet metal of the top cover, and the base cabinet and the top cover are fixed by fastening screws to the bosses from the base cabinet side.

摘要翻译： 投影型显示单元的机壳包括：安装有主要部件的基座机壳和由金属板制成的顶盖，以便覆盖基座，其中形成顶盖的后表面部分 呈弧形的形状，在侧视图中呈U形。 U形曲面以人体工程学的方式形成，使得即使用一只手也可以牢固地抓住后表面部分。 在顶盖的后侧，通过使用与顶盖的金属板不同的材料的树脂将凸台一体地形成，并且底座和顶盖通过紧固螺钉固定到凸台上 底柜侧。

公开(公告)号：US5684974A

公开(公告)日：1997-11-04

申请号：US402371

申请日：1995-03-13

申请人： Osamu Onodera

发明人： Osamu Onodera

IPC分类号： G06F9/46 ,  G06F12/02 ,  G06F12/10 ,  G06F12/12 ,  G06F12/00 ,  G06F9/26 ,  G06F9/32

CPC分类号： G06F12/0284 ,  G06F12/121 ,  G06F2212/151

摘要： An apparatus and method for controlling the reconfiguration of the physical storage area in a real storage device employed by an information processing system. The invention includes an address reconfiguration array having a plurality of storage blocks which are each assigned to a virtual computer. Each storage block is composed of a plurality of host real-address entries. Assigned to a storage area in the logical memory of a virtual computer, each host real-address entry includes a validity field containing a validity bit and a host real-address field containing a high-order part of the start address of a real storage segment allocated to the storage area. The invention also includes a selector which receives the identifier of a virtual computer and a logical address from the virtual computer, and makes use of the identifier for choosing a storage block from the address reconfiguration array and a high-order portion of the logical address for selecting a host real-address entry from the chosen storage block. The value of the host real-address field of the selected host real-address entry, the high-order part of a real address, is then read out from the selected host real-address entry, and is merged with the low-order portion of the logical address in order to create a real address. If the validity bit indicates that the contents of the host real-address entry are invalid, however, the virtual computer is interrupted. A change to the contents of the address reconfiguration array can be made by replacing the contents of a host real-address entry chosen by the selector with update data.

摘要翻译： 一种用于控制由信息处理系统采用的真实存储设备中的物理存储区域的重新配置的装置和方法。 本发明包括具有多个存储块的地址重新配置阵列，每个存储块被分配给虚拟计算机。 每个存储块由多个主机实地址条目组成。 分配给虚拟计算机的逻辑存储器中的存储区域，每个主机实地址条目包括包含有效位的有效性字段和包含真实存储段的起始地址的高阶部分的主机实地址字段 分配到存储区域。 本发明还包括从虚拟计算机接收虚拟计算机的标识符和逻辑地址的选择器，并且利用用于从地址重新配置阵列中选择存储块的标识符和逻辑地址的高阶部分 从所选存储块中选择主机实地址条目。 所选主机实地址条目的主机实地址字段的值，即实地址的高阶部分，然后从所选主机实地址条目中读出，并与低阶部分合并 的逻辑地址，以创建一个真实的地址。 然而，如果有效位指示主机实地址条目的内容无效，则虚拟计算机被中断。 可以通过将具有更新数据的选择器选择的主机实地址条目的内容替换来对地址重配置阵列的内容进行更改。