Optical signal receiving circuit
    11.
    发明授权
    Optical signal receiving circuit 失效
    光信号接收电路

    公开(公告)号:US08170425B2

    公开(公告)日:2012-05-01

    申请号:US12350612

    申请日:2009-01-08

    IPC分类号: H04B10/06

    CPC分类号: H03F3/087

    摘要: To solve problematic trade-off between a bandwidth and a in-band deviation in an optical signal receiving circuit of a gigabit order that is required to have a wide dynamic range, the optical signal receiving circuit has a current-voltage conversion circuit that receives as an input a current signal outputted from a photoelectric conversion circuit for receiving and converting an optical signal into a current signal and converts it into a voltage signal, and realizes the wide dynamic range by providing the current-voltage conversion circuit with an AGC function and a phase compensation function by MOS transistors and a capacitance. Further, by providing the current-voltage conversion circuit with a second phase compensation function by a MOS transistor and a capacitance, it is made possible for the optical signal receiving circuit to reduce the in-band deviation at the time of minimum gain while securing the bandwidth at the time of maximum gain.

    摘要翻译: 为了解决需要具有宽动态范围的吉比特级的光信号接收电路中的带宽和带内偏差之间的有问题的权衡,光信号接收电路具有电流 - 电压转换电路,其接收为 输入从光电转换电路输出的电流信号,用于接收光信号并将其转换为电流信号并将其转换成电压信号,并通过向电流 - 电压转换电路提供AGC功能和 MOS晶体管的相位补偿功能和电容。 此外,通过由MOS晶体管提供具有第二相位补偿功能的电流 - 电压转换电路和电容,使得光信号接收电路可以在最小增益时减小带内偏差,同时确保 最大增益时的带宽。

    Photosensitive composition, partition walls and black matrix
    12.
    发明授权
    Photosensitive composition, partition walls and black matrix 失效
    光敏组合物,隔墙和黑色矩阵

    公开(公告)号:US08153340B2

    公开(公告)日:2012-04-10

    申请号:US12627099

    申请日:2009-11-30

    IPC分类号: G03F7/004 G02B5/20

    摘要: To provide a photosensitive composition with which it is possible to form partition walls (black matrix) having excellent light shielding properties and liquid repellency.A photosensitive composition, which comprises a polymer (A) having a side chain containing a fluorine atom-containing group or a silicon atom-containing group and a side chain containing an ethylenic double bond in one molecule, a black colorant (B), a photopolymerization initiator (C) which is an O-acyloxime compound, and a photosensitive resin (D) containing an acidic group and an ethylenic double bond in one molecule, wherein the proportion of the black colorant (B) in the total solid content of the composition is from 15 to 60 mass %.

    摘要翻译: 为了提供可以形成具有优异的遮光性和拒水性的分隔壁(黑矩阵)的光敏组合物。 一种光敏组合物,其包含在一分子中具有含有含氟原子基团或含硅原子的基团的侧链和含有烯属双键的侧链的聚合物(A),黑色着色剂(B), 作为O-酰氧基肟化合物的光聚合引发剂(C)和在一个分子中含有酸性基团和烯属双键的感光性树脂(D),其中黑色着色剂(B)的总固体成分的比例 组成为15〜60质量%。

    SOCKET
    13.
    发明申请
    SOCKET 有权
    插座

    公开(公告)号:US20100248518A1

    公开(公告)日:2010-09-30

    申请号:US12734933

    申请日:2008-11-18

    IPC分类号: H01R13/62

    CPC分类号: H01R12/7076 H01R12/7082

    摘要: Provided is a socket which protects an upper surface of a semiconductor device from being scratched due to contact, by using a latch plate. A socket (10) includes a base member (20); a cover member (30) which reciprocates in a direction to be close to or separated from the base member (20); a plurality of contacts (40); an adaptor (50), which moves in a direction to be close to or separated from the base member and provides a surface for placing a semiconductor package; a latch member (60) which rotationally shifts with reciprocation of the cover member (30); and a latch plate (70) connected to the latch member (60). The latch plate (70) prevents the leading edge of the latch member (60) from being directly brought into contact with a BGA, and presses down the BGA placed on the adaptor (50) in the vertical direction.

    摘要翻译: 提供了一种通过使用闩锁板来保护半导体器件的上表面由于接触而被划伤的插座。 插座(10)包括基座(20); 覆盖构件(30),其在与所述基座构件(20)接近或分离的方向上往复运动; 多个触点(40); 适配器(50),其沿与所述基座构件接近或分离的方向移动并提供用于放置半导体封装的表面; 与所述盖构件(30)往复运动的卡合构件(60)。 以及连接到所述闩锁构件(60)的闩锁板(70)。 闩锁板(70)防止闩锁构件(60)的前缘直接与BGA接触,并且沿垂直方向按压放置在适配器(50)上的BGA。

    PROCESS FOR PRODUCING SUBSTRATE HAVING PARTITION WALLS AND PIXELS FORMED THEREON
    15.
    发明申请
    PROCESS FOR PRODUCING SUBSTRATE HAVING PARTITION WALLS AND PIXELS FORMED THEREON 审中-公开
    用于生产具有分割壁和其形成的像素的基底的方法

    公开(公告)号:US20100075237A1

    公开(公告)日:2010-03-25

    申请号:US12627727

    申请日:2009-11-30

    IPC分类号: G03F7/20

    摘要: To provide a process for producing a substrate having partition walls and pixels formed thereon, by which it is possible to obtain partition walls excellent in the liquid repellency and pixels having an ink layer excellent in the uniformity in the thickness.A process for producing a substrate having partition walls and pixels formed thereon, which comprises forming partition walls on a substrate by a step (11) of coating the substrate with a photosensitive composition comprising a polymer (A) having a side chain containing a fluorine atom-containing group or a silicon atom-containing group and a side chain containing an ethylenic double bond in one molecule, a step (12) of drying a coating film of the photosensitive composition, an exposure step (13), a development step (14) and a post-exposure step (15); and forming a film by a step (21) of injecting an ink within dots which are regions partitioned by the partition walls and a step (22) of drying a coating film of the ink, the film satisfying (h1−h2)/h1

    摘要翻译: 为了提供一种制造具有形成在其上的隔壁和像素的基板的方法,通过该方法可以获得具有优异的疏液性的隔壁和具有优异的厚度均匀性优异的油墨层的像素。 一种用于制造具有形成在其上的隔壁和像素的基板的方法,其包括通过用包含具有含有氟原子的侧链的聚合物(A)的光敏组合物的步骤(11)在基板上形成分隔壁 含有硅原子的基团和在一个分子中含有烯属双键的侧链,干燥感光性组合物的被覆膜的工序(12),曝光工序(13),显影工序(14) )和曝光后步骤(15); 以及通过在由所述分隔壁分隔的区域的点内注入墨水的步骤(21)和使所述墨水的涂膜干燥的工序(22)来形成薄膜,所述薄膜满足(h1-h2)/ h1 < 0.3,其中h1是一个点中油墨层的最大厚度,h 2是最小厚度,从而获得像素。

    Pulse width modulation controller and pulse waveform control method
    16.
    发明申请
    Pulse width modulation controller and pulse waveform control method 有权
    脉宽调制控制器和脉搏波形控制方法

    公开(公告)号:US20090296805A1

    公开(公告)日:2009-12-03

    申请号:US12453606

    申请日:2009-05-15

    IPC分类号: H03K9/08 H03K7/08

    CPC分类号: H03K7/08 G06F1/025

    摘要: A pulse width modulation (PWM) controller includes: a first counter for counting a reference clock signal, and thus outputting a first count value, a leading edge control signal generator for outputting a leading edge control signal on a basis of the first count value, an adjustment clock generator for generating an adjustment clock signal, a second counter controller for instructing the adjustment clock generator to start to output the adjustment clock signal, a second counter for outputting a second count value, a trailing edge control signal generator for outputting a trailing edge control signal on a basis of the second count value, and a PWM pulse generator for synthesizing the leading edge control signal and the trailing edge control signal, and thus generating a pulse width modulation signal.

    摘要翻译: 脉冲宽度调制(PWM)控制器包括:第一计数器,用于对参考时钟信号进行计数,从而输出第一计数值;前沿控制信号发生器,用于根据第一计数值输出前沿控制信号; 用于产生调整时钟信号的调整时钟发生器,用于指示调节时钟发生器开始输出调节时钟信号的第二计数器控制器,用于输出第二计数值的第二计数器,用于输出尾随的后沿控制信号发生器 基于第二计数值的边沿控制信号,以及用于合成前沿控制信号和后沿控制信号的PWM脉冲发生器,从而产生脉宽调制信号。

    Socket adaptor apparatus
    18.
    发明授权
    Socket adaptor apparatus 有权
    插座适配器

    公开(公告)号:US07601008B2

    公开(公告)日:2009-10-13

    申请号:US12136460

    申请日:2008-06-10

    IPC分类号: H01R12/00

    摘要: A socket adaptor 10 made of an electrically insulating material has a main adaptor body 12 on which a plurality of through holes 14 containing an upper opening and a lower opening has been formed. In certain preferred embodiments a probe pin 60 and coil spring 62 is placed in each through hole 14. An electrical engagement clipping part 68 for clipping a contact inserted in a respective through hole from said upper opening is formed on the upper end of each probe pin 60. The coil spring 62 is installed on each probe pin and biases the respective probe pin toward a position so that a tip formed on the lower end of the probe pin protrudes from the lower opening.

    摘要翻译: 由电绝缘材料制成的插座适配器10具有主适配器主体12,其上形成有包含上开口和下开口的多个通孔14。 在某些优选实施例中,探针60和螺旋弹簧62被放置在每个通孔14中。用于夹住从所述上开口插入相应通孔的触点的电接合夹持部分68形成在每个探针的上端 螺旋弹簧62安装在每个探针上,并将相应的探头针偏压到一个位置,使得形成在探针的下端的尖端从下开口突出。

    PROCESSES FOR FORMING PARTITION WALLS, COLOR FILTER AND ORGANIC EL
    19.
    发明申请
    PROCESSES FOR FORMING PARTITION WALLS, COLOR FILTER AND ORGANIC EL 审中-公开
    形成分隔壁,彩色滤光片和有机EL的方法

    公开(公告)号:US20080233493A1

    公开(公告)日:2008-09-25

    申请号:US12127993

    申请日:2008-05-28

    IPC分类号: G03F7/20

    摘要: To provide a process for forming partition walls excellent in the uniformity in thickness of the ink layer even when light exposure is low in the exposure step.A process for forming partition walls, which comprises a step of coating a substrate with a negative photosensitive composition containing a fluorinated polymer (A) having a side chain containing a fluoroalkyl group (which may have an etheric oxygen atom) and a side chain containing an ethylenic double bond, a drying step, an exposure step and a development step in this order, followed by a post-exposure step.

    摘要翻译: 为了提供即使在曝光步骤中曝光低的情况下也能形成油墨层厚度均匀性优异的间隔壁的工序。 一种形成隔壁的方法,其包括用含有含有氟代烷基(可具有醚性氧原子的)侧链的含氟聚合物(A)的负型感光性组合物和含有 乙烯双键,干燥步骤,曝光步骤和显影步骤,然后是曝光后步骤。

    LIQUID CRYSTAL DISPLAY DEVICE
    20.
    发明申请
    LIQUID CRYSTAL DISPLAY DEVICE 审中-公开
    液晶显示装置

    公开(公告)号:US20080055524A1

    公开(公告)日:2008-03-06

    申请号:US11778206

    申请日:2007-07-16

    IPC分类号: G02F1/13 G02F1/1333

    CPC分类号: G02F1/133516

    摘要: Provided is a liquid crystal display device that makes it possible to prevent coating unevenness of a colored layer from occurring. The liquid crystal display device includes a first colored layer, a second colored layer and a third colored layer, which layers are formed in a display area. In the liquid crystal display device, the first colored layer is arranged in a grid pattern in a manner of surrounding the second colored layer and the third colored layer. In addition, when (n, m) denotes the coordinates of a pixel having a grid square formed therein in the display area, grid squares are omitted in at least pixels of (n−1, m−1), (n−1, m+1), (n+1, m−1) and (n+1, m+1).

    摘要翻译: 提供一种能够防止着色层的涂布不均匀性的液晶显示装置。 液晶显示装置包括第一着色层,第二着色层和第三着色层,这些层形成在显示区域中。 在液晶显示装置中,第一着色层以包围第二着色层和第三着色层的方式配置为网格图案。 另外,当(n,m)表示在显示区域中形成有栅格方形的像素的坐标时,在(n-1,m-1),(n-1, m + 1),(n + 1,m-1)和(n + 1,m + 1)。