摘要:
Each of the unit cells provided on a semiconductor substrate of a solid-state imaging device comprises a first p-type well which isolates the semiconductor substrate into an n-type photoelectric conversion region, a second p-type well which is formed in the surface of the photoelectric conversion region and in which a signal scanning circuit section is formed, and a signal storage section which is comprised of a highly doped n-type layer which is formed in the surface of the photoelectric conversion region apart from the second p-type well and higher in impurity concentration than the photoelectric conversion region. The signal storage section having its part placed under a signal readout gate adapted to transfer a packet of signal charge from the storage section to the signal scanning circuit section and its part at which the potential becomes deepest located under the readout gate.
摘要:
The solid-state image sensor comprises a semiconductor substrate, a plurality of photoelectric conversion sections formed within respective isolated active regions on the semiconductor substrate, an image area wherein unit cells comprising the plurality of photoelectric conversion sections and a signal scanning circuit are arranged in a two-dimensional array form, and signal lines for reading signals from the respective unit cells within the image pick-up area, wherein the respective photoelectric conversion sections being formed by at least twice ion implantation.
摘要:
The present invention provides a solid state image sensor constructed in such a manner that, even if the impurity concentration of the wells of a transistors is increased, the junction leakage current does not increase, and thus, the picture quality of the reproduced picture is not deteriorated. On a p-type substrate, there are formed a first p-type well for a photoelectric conversion portion comprising a photodiode, and a second p-type well for a signal scanning circuit portion. In the surface portions of the first and second p-type wells, a first and a second n-type diffused layers are formed, respectively. The drain of a reset transistor and the drain of an amplifying transistor which constitute the second n-type diffused layer are connected to a power supply line. Further, the source of an address transistor which is an n-type diffused layer is connected to a vertical signal line. The gates of the amplifying transistor and the address transistor are formed between second n-type diffused layers disposed at predetermined intervals on the surface of the second p-type well.
摘要:
Image sensors are provided including a substrate defining a plurality of pixel regions, the substrate having a first surface and a second surface opposite the first surface. The second surface of the substrate is configured to receive light incident thereon and the substrate defines a deep trench extending from the second surface of the substrate toward the first surface substrate and separating the plurality of pixel regions from each other. In each of the plurality of pixel regions of the substrate, a photoelectric conversion region is provided. A gate electrode is provided on the photoelectric conversion region and a negative fixed charge layer covering the second surface of the substrate and at least a portion of a sidewall of the deep trench is also provided. The image sensors further include a shallow device isolation layer on the first surface of the substrate. The shallow device isolation layer defines an active region in each of the pixel regions and the negative fixed charge layer contacts the shallow device isolation layer.
摘要:
A CMOS image sensor includes a substrate and at least one device isolation region in the substrate and defining first and second pixel regions and first and second active portions in each of the first and second pixel regions. A reset and select transistor gates are disposed in the first pixel region, while a source follower transistor gate is disposed in the second pixel region, such that pixels in the first and second pixel regions share the reset, select and source follower transistors. A length of the source follower transistor gate may be greater than lengths of the reset and selection transistor gates.
摘要:
A pinned photodiode structure with peninsula-shaped transfer gate which decrease the occurrence of a potential barrier between the photodiode and the floating drain, prevents loss of full well capacity (FWC) and decreases occurrences of image lag.
摘要:
A solid-state image pickup device comprising a semiconductor substrate which comprises a substrate body containing P-type impurities and a first N-type semiconductor layer containing N-type impurities, the first N-type semiconductor layer being provided on the substrate body, and including a first P-type semiconductor layer which contains p-type impurities, and which is located on the substrate body, a plurality of optical/electrical conversion portions formed of second N-type semiconductor layers which are provided independently of each other in respective positions in a surface portion of the first N-type semiconductor layer, and a plurality of second P-type semiconductor layers which are formed to surround the optical/electrical conversion portions, which are provided along element isolation regions provided in respective positions in the surface portion of the first N-type semiconductor layer, and which continuously extend from the surface portion of the first N-type semiconductor layer to a surface portion of the first P-type semiconductor layer.
摘要:
A solid-state image pickup device comprising a semiconductor substrate which comprises a substrate body containing P-type impurities and a first N-type semiconductor layer containing N-type impurities, the first N-type semiconductor layer being provided on the substrate body, and including a first P-type semiconductor layer which contains p-type impurities, and which is located on the substrate body, a plurality of optical/electrical conversion portions formed of second N-type semiconductor layers which are provided independently of each other in respective positions in a surface portion of the first N-type semiconductor layer, and a plurality of second P-type semiconductor layers which are formed to surround the optical/electrical conversion portions, which are provided along element isolation regions provided in respective positions in the surface portion of the first N-type semiconductor layer, and which continuously extend from the surface portion of the first N-type semiconductor layer to a surface portion of the first P-type semiconductor layer.
摘要:
A solid-state image sensor having a well of a first conductivity type; a photoelectric conversion region having a second conductivity type formed in the well storing charges obtained from a photoelectric conversion; a drain region having the second conductivity type formed in the well apart from a surface of the well; and a gate electrode formed on the surface of the well via a gate insulator, the gate electrode transferring the charges from the photoelectric conversion region to the drain region. Alternatively, a transistor includes a first semiconductor region having a first conductivity type; second and third semiconductor regions having a second conductivity type formed in the first semiconductor region, the second and third semiconductor regions being separated from each other by a portion of the first semiconductor region serving as a channel region; an insulator layer provided on a surface of the first semiconductor region in contact with the channel region; a gate electrode provided on the insulator layer; and the first semiconductor region includes a shield semiconductor region of the first conductivity type disposed between the surface of the first semiconductor region and at least one of the second and third semiconductor regions such that the at least one of the second and third semiconductor regions is sandwiched between the shield region and the first semiconductor region.
摘要:
A solid state imaging device includes a substrate of a first conductivity type. A transistor, which includes a first gate electrode and a first and second impurity areas, is provided on a surface of the substrate. The first and second impurity areas are formed in the surface of the substrate and sandwich a region under the first gate electrode. A third impurity area of a second conductivity type is formed in the surface of the substrate and spaced from the second impurity area at an opposite side to the first gate electrode. A fourth impurity area is formed under the second impurity area and connected to the third impurity area. A second gate electrode is provided above the substrate. A fifth impurity area of the second conductivity type is formed in the surface of the substrate. The third and fifth impurity areas sandwich a region under the second gate electrode.