公开(公告)号：US11944965B2

公开(公告)日：2024-04-02

申请号：US16880247

申请日：2020-05-21

Applicant: IMEC VZW

Inventor： Giuseppe Fiorentino ,  Simone Severi ,  Aurelie Humbert

IPC: B81C1/00 ,  B01L3/00 ,  B29C65/02

CPC classification number: B01L3/502715 ,  B01L3/502707 ,  B29C65/02 ,  B81C1/00119 ,  B01L2200/10 ,  B01L2300/0838 ,  B01L2300/0887 ,  B81C2201/013 ,  B81C2203/03 ,  B81C2203/031 ,  B81C2203/036

Abstract: A microfluidic device, a diagnostic device including the microfluidic device and a method for making the microfluidic device are provided. The microfluidic device includes: (i) a transparent substrate comprising a cavity, the cavity opening up to a top of the transparent substrate; (ii) a transparent layer covering the cavity, and (iii) a semiconductor substrate over the transparent layer and the transparent substrate, wherein the semiconductor substrate comprises a through hole overlaying the cavity and exposing the transparent layer.

公开(公告)号：US20230127645A1

公开(公告)日：2023-04-27

申请号：US18045287

申请日：2022-10-10

Applicant: IMEC VZW

Inventor： Simone Severi ,  Bert Du Bois ,  Ashesh Ray Chaudhuri

IPC: B81C1/00 ,  B81B1/00

Abstract: An intermediate structure for a microfluidic device and a method for manufacturing a microfluidic device are provided. The method includes: a) providing a first substrate having a first layer thereon, and a second layer on the first layer; b) forming a first nanopore in the second layer, in such a way that a part of the first layer coincides with a bottom of the first nanopore; c) exposing said part of the first layer to a liquid etchant, thereby forming a cavity under the first nanopore, the cavity having a larger width than a width of the bottom of the first nanopore; d) filling the first nanopore and the cavity with a filling material, thereby forming a first plug; e) forming a bottom fluidic access for the nanopore by removing part of the first substrate and part of the first layer so as to expose the plug; and f) removing the plug, thereby fluidly connecting the bottom fluidic access to the nanopore.

公开(公告)号：US11408764B2

公开(公告)日：2022-08-09

申请号：US16703657

申请日：2019-12-04

Applicant: IMEC VZW ,  KATHOLIEKE UNIVERSITEIT LEUVEN

Inventor： Wouter Jan Westerveld ,  Veronique Rochus ,  Simone Severi ,  Roelof Jansen

IPC: G01H9/00 ,  G02B6/42 ,  G02B6/293

Abstract: A sensor comprises: a thin structure, which is configured to receive a force for deforming a shape of the thin structure and which is arranged above a substrate; and a waveguide for guiding an electro-magnetic wave comprising: a first waveguide part; and a second waveguide part; wherein the second waveguide part has a larger width than the first waveguide part; and wherein the first and the second waveguide parts are spaced apart by a gap which is sufficiently small such that the first and second waveguide parts unitely form a single waveguide, wherein one of the first and the second waveguide part is arranged at least partly on the thin structure and another of the first and the second waveguide part is arranged on the substrate.

公开(公告)号：US11367797B2

公开(公告)日：2022-06-21

申请号：US16761712

申请日：2018-07-24

Applicant: IMEC VZW

Inventor： Chang Chen ,  Koen Martens ,  Pol Van Dorpe ,  Simone Severi

IPC: H01L21/00 ,  H01L29/786 ,  G01N27/414 ,  H01L21/308 ,  H01L29/10 ,  H01L29/51

Abstract: In a first aspect, the present invention relates to a nanopore field-effect transistor sensor (100), comprising: i) a source region (310) and a drain region (320), defining a source-drain axis; ii) a channel region (330) between the source region (310) and the drain region (320); iii) a nanopore (400), defined as an opening in the channel region (330) which completely crosses through the channel region (330), oriented at an angle to the source-drain axis, having a first orifice (410) and a second orifice (420), and being adapted for creating a non-linear potential profile between the first (410) and second (420) orifice.

公开(公告)号：US20210184053A1

公开(公告)日：2021-06-17

申请号：US16761712

申请日：2018-07-24

Applicant: IMEC VZW

Inventor： Chang Chen ,  Koen Martens ,  Pol Van Dorpe ,  Simone Severi

IPC: H01L29/786 ,  H01L29/51 ,  H01L29/10 ,  H01L21/308 ,  G01N27/414

Abstract: In a first aspect, the present invention relates to a nanopore field-effect transistor sensor (100), comprising: i) a source region (310) and a drain region (320), defining a source-drain axis; ii) a channel region (330) between the source region (310) and the drain region (320); iii) a nanopore (400), defined as an opening in the channel region (330) which completely crosses through the channel region (330), oriented at an angle to the source-drain axis, having a first orifice (410) and a second orifice (420), and being adapted for creating a non-linear potential profile between the first (410) and second (420) orifice.

公开(公告)号：US10768138B2

公开(公告)日：2020-09-08

申请号：US16228092

申请日：2018-12-20

Applicant: IMEC VZW

Inventor： Koen Martens ,  Nadine Collaert ,  Eddy Kunnen ,  Simone Severi

IPC: G01N27/414

Abstract: Examples include a method for forming an intermediate in the fabrication of a field-effect transistor sensor, the method comprising: providing a substrate having a substrate region comprising a gate dielectric thereon and optionally a nanocavity therein, providing a sacrificial element over the substrate region, providing one or more layers having a combined thickness of at least 100 nm over the sacrificial element, opening an access to the sacrificial element through the one or more layers, and optionally selectively removing the sacrificial element, thereby opening a sensor cavity over the substrate region; wherein the sacrificial element is removable by oxidation and wherein selectively removing the sacrificial element comprises an oxidative removal.

公开(公告)号：US20190195827A1

公开(公告)日：2019-06-27

申请号：US16228092

申请日：2018-12-20

Applicant: IMEC VZW

Inventor： Koen Martens ,  Nadine Collaert ,  Eddy Kunnen ,  Simone Severi

IPC: G01N27/414

CPC classification number: G01N27/4146 ,  G01N27/4145

Abstract: Examples include a method for forming an intermediate in the fabrication of a field-effect transistor sensor, the method comprising: providing a substrate having a substrate region comprising a gate dielectric thereon and optionally a nanocavity therein, providing a sacrificial element over the substrate region, providing one or more layers having a combined thickness of at least 100 nm over the sacrificial element, opening an access to the sacrificial element through the one or more layers, and optionally selectively removing the sacrificial element, thereby opening a sensor cavity over the substrate region; wherein the sacrificial element is removable by oxidation and wherein selectively removing the sacrificial element comprises an oxidative removal.