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公开(公告)号:US12188895B2
公开(公告)日:2025-01-07
申请号:US17692717
申请日:2022-03-11
Applicant: IMEC VZW
Inventor: David Barge , Bert Du Bois , Simone Severi , Ashesh Ray Chaudhuri
IPC: H01L21/00 , G01N27/414
Abstract: A method for forming a nanopore transistor and a nanopore transistor is provided. The method includes: (a) forming an aperture in a filler material by: (i) providing a fin comprising a semiconductor layer and a top layer; (ii) patterning the top layer to form a pillar; (iii) embedding the pillar in a filler material; (iv) removing the pillar, leaving an aperture; (v) lining the aperture with a spacer material; (b) forming a nanopore by etching through the aperture; (b) lining the nanopore with a dielectric, (c) forming a source and a drain by either: between steps a.ii and a.iii, doping the bottom semiconductor layer by using the pillar as a mask, or after step c, filling the aperture with a sealing material, thereby forming a post; removing the filler material; doping the bottom semiconductor layer by using the post as a mask; and removing the sealing material.
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公开(公告)号:US11676851B2
公开(公告)日:2023-06-13
申请号:US16957090
申请日:2018-12-19
Applicant: IMEC VZW
Inventor: Aurelie Humbert , Simone Severi
IPC: H01L21/762 , G01N27/414
CPC classification number: H01L21/76251 , G01N27/4145 , G01N27/4146 , G01N27/4148
Abstract: According to an aspect of the present inventive concept there is provided a method for manufacturing a fluid sensor device comprising: bonding a silicon-on-insulator arrangement comprising a silicon wafer, a buried oxide, a silicon layer, and a first dielectric layer, to a CMOS arrangement comprising a metallization layer and a planarized dielectric layer, wherein the bonding is performed via the first dielectric layer and the planarized dielectric layer; forming a fin-FET arrangement in the silicon layer, wherein the fin-FET arrangement is configured to function as a fluid sensitive fin-FET arrangement; removing the buried oxide and the silicon wafer; forming a contact to the metallization layer and the fin-FET arrangement, wherein the contact comprises an interconnecting structure configured to interconnect the metallization layer and the fin-FET arrangement; forming a channel comprising an inlet and an outlet, wherein the channel is configured to allow a fluid comprising an analyte to contact the fin-FET arrangement.
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公开(公告)号:US10267733B2
公开(公告)日:2019-04-23
申请号:US15312116
申请日:2015-05-22
Applicant: IMEC VZW
Inventor: Pol Van Dorpe , Liesbet Lagae , Peter Peumans , Andim Stassen , Philippe Helin , Bert Du Bois , Simone Severi
Abstract: The present disclosure relates to semiconductor devices for detecting fluorescent particles. At least one embodiment relates to an integrated semiconductor device for detecting fluorescent tags. The device includes a first layer, a second layer, a third layer, a fourth layer, and a fifth layer. The first layer includes a detector element. The second layer includes a rejection filter. The third layer is fabricated from dielectric material. The fourth layer is an optical waveguide configured and positioned such that a top surface of the fourth layer is illuminated with an evanescent tail of excitation light guided by the optical waveguide when the fluorescent tags are present. The fifth layer includes a microfluidic channel. The optical waveguide is configured and positioned such that the microfluidic channel is illuminated with the evanescent tail. The detector element is positioned such that light from activated fluorescent tags can be received.
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公开(公告)号:US20170082544A1
公开(公告)日:2017-03-23
申请号:US15312116
申请日:2015-05-22
Applicant: IMEC VZW
Inventor: Pol Van Dorpe , Liesbet Lagae , Peter Peumans , Andim Stassen , Philippe Helin , Bert Du Bois , Simone Severi
IPC: G01N21/64
CPC classification number: G01N21/6428 , G01N21/6454 , G01N21/648 , G01N21/7703 , G01N2201/0873
Abstract: The present disclosure relates to semiconductor devices for detecting fluorescent particles. At least one embodiment relates to an integrated semiconductor device for detecting fluorescent tags. The device includes a first layer, a second layer, a third layer, a fourth layer, and a fifth layer. The first layer includes a detector element. The second layer includes a rejection filter. The third layer is fabricated from dielectric material. The fourth layer is an optical waveguide configured and positioned such that a top surface of the fourth layer is illuminated with an evanescent tail of excitation light guided by the optical waveguide when the fluorescent tags are present. The fifth layer includes a microfluidic channel. The optical waveguide is configured and positioned such that the microfluidic channel is illuminated with the evanescent tail. The detector element is positioned such that light from activated fluorescent tags can be received.
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公开(公告)号:US20220334079A1
公开(公告)日:2022-10-20
申请号:US17692717
申请日:2022-03-11
Applicant: IMEC VZW
Inventor: David Barge , Bert Du Bois , Simone Severi , Ashesh Ray Chaudhuri
IPC: G01N27/414
Abstract: A method for forming a nanopore transistor and a nanopore transistor is provided. The method includes: (a) forming an aperture in a filler material by: (i) providing a fin comprising a semiconductor layer and a top layer; (ii) pattering the top layer to form a pillar; (iii) embedding the pillar in a filler material; (iv) removing the pillar, leaving an aperture; (v) lining the aperture with a spacer material; (b) forming a nanopore by etching through the aperture; (b) lining the nanopore with a dielectric, (c) forming a source and a drain by either: between steps a.ii and a.iii, doping the bottom semiconductor layer by using the pillar as a mask, or after step c, filling the aperture with a sealing material, thereby forming a post; removing the filler material; doping the bottom semiconductor layer by using the post as a mask; and removing the sealing material.
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公开(公告)号:US11372158B2
公开(公告)日:2022-06-28
申请号:US16703242
申请日:2019-12-04
Applicant: IMEC VZW , KATHOLIEKE UNIVERSITEIT LEUVEN
Inventor: Wouter Jan Westerveld , Veronique Rochus , Simone Severi , Roelof Jansen
Abstract: A waveguide for guiding an electro-magnetic wave comprises: a first waveguide part; and a second waveguide part; wherein the first waveguide part has a first width in a first direction (Y) perpendicular to the direction of propagation of the electro-magnetic wave and the second waveguide part has a second width in the first direction (Y), wherein the second width is larger than the first width; and wherein the first and the second waveguide parts are spaced apart by a gap in a second direction (Z) perpendicular to the first and second planes in which the waveguide parts are formed, wherein the gap has a size which is sufficiently small such that the first and second waveguide parts unitely form a single waveguide for guiding the electro-magnetic wave. The waveguide may be used in numerous applications, such as in a photonic integrated circuit, in a sensor or in an actuator.
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公开(公告)号:US11944965B2
公开(公告)日:2024-04-02
申请号:US16880247
申请日:2020-05-21
Applicant: IMEC VZW
Inventor: Giuseppe Fiorentino , Simone Severi , Aurelie Humbert
CPC classification number: B01L3/502715 , B01L3/502707 , B29C65/02 , B81C1/00119 , B01L2200/10 , B01L2300/0838 , B01L2300/0887 , B81C2201/013 , B81C2203/03 , B81C2203/031 , B81C2203/036
Abstract: A microfluidic device, a diagnostic device including the microfluidic device and a method for making the microfluidic device are provided. The microfluidic device includes: (i) a transparent substrate comprising a cavity, the cavity opening up to a top of the transparent substrate; (ii) a transparent layer covering the cavity, and (iii) a semiconductor substrate over the transparent layer and the transparent substrate, wherein the semiconductor substrate comprises a through hole overlaying the cavity and exposing the transparent layer.
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公开(公告)号:US20230127645A1
公开(公告)日:2023-04-27
申请号:US18045287
申请日:2022-10-10
Applicant: IMEC VZW
Inventor: Simone Severi , Bert Du Bois , Ashesh Ray Chaudhuri
Abstract: An intermediate structure for a microfluidic device and a method for manufacturing a microfluidic device are provided. The method includes: a) providing a first substrate having a first layer thereon, and a second layer on the first layer; b) forming a first nanopore in the second layer, in such a way that a part of the first layer coincides with a bottom of the first nanopore; c) exposing said part of the first layer to a liquid etchant, thereby forming a cavity under the first nanopore, the cavity having a larger width than a width of the bottom of the first nanopore; d) filling the first nanopore and the cavity with a filling material, thereby forming a first plug; e) forming a bottom fluidic access for the nanopore by removing part of the first substrate and part of the first layer so as to expose the plug; and f) removing the plug, thereby fluidly connecting the bottom fluidic access to the nanopore.
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公开(公告)号:US11408764B2
公开(公告)日:2022-08-09
申请号:US16703657
申请日:2019-12-04
Applicant: IMEC VZW , KATHOLIEKE UNIVERSITEIT LEUVEN
Inventor: Wouter Jan Westerveld , Veronique Rochus , Simone Severi , Roelof Jansen
Abstract: A sensor comprises: a thin structure, which is configured to receive a force for deforming a shape of the thin structure and which is arranged above a substrate; and a waveguide for guiding an electro-magnetic wave comprising: a first waveguide part; and a second waveguide part; wherein the second waveguide part has a larger width than the first waveguide part; and wherein the first and the second waveguide parts are spaced apart by a gap which is sufficiently small such that the first and second waveguide parts unitely form a single waveguide, wherein one of the first and the second waveguide part is arranged at least partly on the thin structure and another of the first and the second waveguide part is arranged on the substrate.
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公开(公告)号:US11367797B2
公开(公告)日:2022-06-21
申请号:US16761712
申请日:2018-07-24
Applicant: IMEC VZW
Inventor: Chang Chen , Koen Martens , Pol Van Dorpe , Simone Severi
IPC: H01L21/00 , H01L29/786 , G01N27/414 , H01L21/308 , H01L29/10 , H01L29/51
Abstract: In a first aspect, the present invention relates to a nanopore field-effect transistor sensor (100), comprising: i) a source region (310) and a drain region (320), defining a source-drain axis; ii) a channel region (330) between the source region (310) and the drain region (320); iii) a nanopore (400), defined as an opening in the channel region (330) which completely crosses through the channel region (330), oriented at an angle to the source-drain axis, having a first orifice (410) and a second orifice (420), and being adapted for creating a non-linear potential profile between the first (410) and second (420) orifice.
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