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11.
公开(公告)号:US20190356308A1
公开(公告)日:2019-11-21
申请号:US16414609
申请日:2019-05-16
Applicant: IMEC vzw
Inventor: Daniele Garbin , Robin Degraeve , Ludovic Goux
IPC: H03K17/0412 , H01L45/00
Abstract: The disclosed technology generally relates to a switching device and more particularly to a switching device based on an active portion capable of switching from an insulating state to a conductive state. In an aspect, a switching device comprises an active portion interposed between two electrodes and capable of switching from an insulating state to a conducting state when a voltage higher than a threshold value is applied between the two electrodes. The threshold value is lowered by a dielectric permittivity distribution which produces a concentration of electrical field at a location within the active portion. Thus, the switching device may be devoid of a third control electrode.
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公开(公告)号:US20170346005A1
公开(公告)日:2017-11-30
申请号:US15165903
申请日:2016-05-26
Applicant: IMEC VZW , Katholieke Universiteit Leuven, KU LEUVEN R&D
Inventor: Ludovic Goux , Andrea Fantini , Chao-Yang Chen
IPC: H01L45/00
CPC classification number: H01L45/146 , H01L45/08 , H01L45/1233 , H01L45/1253 , H01L45/1616
Abstract: A Resistive Random Access Memory (RRAM) device and a method of its manufacture are disclosed. The RRAM device comprises a lower oxygen affinity bottom electrode, a hygroscopic solid-state dielectric layer, comprising hydroxyl groups, and a higher oxygen affinity top electrode. In some embodiments, the hygroscopic solid-state dielectric layer is a rare-earth metal oxide layer.
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公开(公告)号:US09685229B2
公开(公告)日:2017-06-20
申请号:US14957249
申请日:2015-12-02
Applicant: IMEC VZW , Katholieke Universiteit Leuven, KU LEUVEN R&D
Inventor: Ludovic Goux , Attilio Belmonte
CPC classification number: G11C13/0069 , G11C11/5614 , G11C13/0011 , G11C2013/0078 , G11C2013/0083 , G11C2013/0088 , G11C2013/0092 , H01L27/2463 , H01L45/085 , H01L45/1233 , H01L45/1266 , H01L45/145 , H01L45/146
Abstract: A method is disclosed for operating a Conductive Bridge Random Access Memory (CBRAM) device that includes an electrolyte element sandwiched between a cation supply top electrode and a bottom electrode. The method comprises conditioning the CBRAM device by applying a forming current pulse having a pulse width (tf) of 100 ns or less and a pulse amplitude (If) of 10 uA or less, and when programming, setting the conditioned CBRAM device to a Low Resistance State (LRS) by applying a set current pulse having a pulse width (ts) of 100 ns or less and a pulse amplitude (Is) equal to or larger than the forming current pulse amplitude (If).
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公开(公告)号:US20160181518A1
公开(公告)日:2016-06-23
申请号:US14955928
申请日:2015-12-01
Applicant: KATHOLIEKE UNIVERSITEIT LEUVEN, KU LEUVEN R&D , IMEC VZW
Inventor: Ludovic Goux , Attilio Belmonte
IPC: H01L45/00
CPC classification number: H01L45/085 , G11C13/0011 , H01L45/1233 , H01L45/1266 , H01L45/141 , H01L45/146 , H01L45/1608
Abstract: A Conductive Bridge Random Access Memory (CBRAM) device comprising an insulating electrolyte element sandwiched between a cation supply electrode and a bottom electrode, whereby the conductivity σ of the cation provided by the cation supply electrode in the electrolyte element increases towards the bottom electrode.
Abstract translation: 一种导电桥随机存取存储器(CBRAM)装置,包括夹在阳离子供应电极和底电极之间的绝缘电解质元件, 由电解质元件中的阳离子供给电极提供的阳离子朝向底部电极增加。
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