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    Method for Operating a Conductive Bridging Memory Device
    1.
    发明申请
    Method for Operating a Conductive Bridging Memory Device 有权
    用于操作导电桥接存储器件的方法

    公开(公告)号：US20160155502A1

    公开(公告)日：2016-06-02

    申请号：US14957249

    申请日：2015-12-02

    Applicant: Katholieke Universiteit Leuven, KU LEUVEN R&D ,  IMEC VZW

    Inventor： Ludovic Goux ,  Attilio Belmonte

    IPC: G11C13/00 ,  H01L45/00 ,  H01L27/24 ,  G11C11/56

    CPC classification number: G11C13/0069 ,  G11C11/5614 ,  G11C13/0011 ,  G11C2013/0078 ,  G11C2013/0083 ,  G11C2013/0088 ,  G11C2013/0092 ,  H01L27/2463 ,  H01L45/085 ,  H01L45/1233 ,  H01L45/1266 ,  H01L45/145 ,  H01L45/146

    Abstract: A method is disclosed for operating a Conductive Bridge Random Access Memory (CBRAM) device that includes an electrolyte element sandwiched between a cation supply top electrode and a bottom electrode. The method comprises conditioning the CBRAM device by applying a forming current pulse having a pulse width (tf) of 100 ns or less and a pulse amplitude (If) of 10 uA or less, and when programming, setting the conditioned CBRAM device to a Low Resistance State (LRS) by applying a set current pulse having a pulse width (ts) of 100 ns or less and a pulse amplitude (Is) equal to or larger than the forming current pulse amplitude (If).

    Abstract translation: 公开了一种用于操作导电桥随机存取存储器（CBRAM）器件的方法，该器件包括夹在阳离子供应顶电极和底电极之间的电解质元件。 该方法包括通过施加具有100ns或更小的脉冲宽度（tf）和10uA或更小的脉冲幅度（If）的形成电流脉冲来调节CBRAM器件，并且当编程时，将经调节的CBRAM器件设置为低 通过施加具有100ns以下的脉冲宽度（ts）的设定电流脉冲和等于或大于成形电流脉冲振幅（If）的脉冲幅度（Is）的电阻状态（LRS）。

    Three-dimensional semiconductor device and method of fabricating same
    5.
    发明授权
    Three-dimensional semiconductor device and method of fabricating same 有权

    公开(公告)号：US10825868B2

    公开(公告)日：2020-11-03

    申请号：US16234381

    申请日：2018-12-27

    Applicant: IMEC vzw

    Inventor： Romain Delhougne ,  Davide Francesco Crotti ,  Gouri Sankar Kar ,  Luca Di Piazza ,  Ludovic Goux

    IPC: H01L27/24 ,  H01L27/11597 ,  H01L45/00

    Abstract: In one aspect, a method for manufacturing a three-dimensional (3D) semiconductor device is disclosed. It includes providing a vertical stack of alternating layers of a first layer type and a second layer type, and providing a first trench and a second trench adjacent the vertical stack. The first trench and the second trench can define a fin. The method further can include recessing the first layer type to form recesses extending into the fin, providing a first electrode in individual ones of the recesses, and providing a second electrode in the first trench and the second trench. The method further can include providing, for individual ones of the recesses, a lateral stack including a memory element, a middle electrode, and a selector element. The lateral stack can extend between the first electrode and the second electrode, thereby forming a memory device.

    STRUCTURE FOR USE IN A METAL-INSULATOR-METAL CAPACITOR
    6.
    发明申请
    STRUCTURE FOR USE IN A METAL-INSULATOR-METAL CAPACITOR 审中-公开

    公开(公告)号：US20200176554A1

    公开(公告)日：2020-06-04

    申请号：US16677309

    申请日：2019-11-07

    Applicant: IMEC vzw

    Inventor： Mihaela Ioana Popovici ,  Ludovic Goux ,  Gouri Sankar Kar

    IPC: H01L49/02 ,  H01L27/108 ,  H01L21/02 ,  H01L21/285

    Abstract: The disclosed technology relates to a structure for use in a metal-insulator-metal capacitor. In one aspect, the structure comprises a bottom electrode formed of a Ru layer. The Ru layer has a top surface characterized by a grazing incidence X-ray diffraction spectrum comprising a first intensity and a second intensity, the first intensity corresponding to a diffracting plane of Miller indices (0 0 2) being larger than the second intensity corresponding to a diffracting plane of Miller indices (1 0 1). The structure further comprises an interlayer on the top surface of the Ru layer, the interlayer being formed of an oxide of Sr and Ru having a cubic lattice structure, and a dielectric layer on the interlayer, the dielectric layer being formed of an oxide of Sr and Ti.

    Integrated circuit devices based on metal ion migration and methods of fabricating same
    7.
    发明授权
    Integrated circuit devices based on metal ion migration and methods of fabricating same 有权

    公开(公告)号：US11075337B2

    公开(公告)日：2021-07-27

    申请号：US16560777

    申请日：2019-09-04

    Applicant: IMEC vzw

    Inventor： Ludovic Goux

    IPC: H01L45/00 ,  C23C16/04 ,  C23C16/455

    Abstract: The disclosed technology generally relates to integrated circuit (IC) devices and more particularly to IC devices based on metal ion migration, and to manufacturing of the IC devices. In one aspect, a method of manufacturing an integrated electronic circuit, which includes at least one component based on metal ion migration and reduction, allows improved control of an amount of the metal which is incorporated into the component. This amount is produced from a metal supply layer and transferred into a container selectively with respect to the rest of the component. The container is configured as part of an electrolyte portion or active electrode in the final component. The method is compatible with two-dimensional and three-dimensional configurations of the component.

    Structure for use in a metal-insulator-metal capacitor
    8.
    发明授权
    Structure for use in a metal-insulator-metal capacitor 有权

    公开(公告)号：US11075261B2

    公开(公告)日：2021-07-27

    申请号：US16677309

    申请日：2019-11-07

    Applicant: IMEC vzw

    Inventor： Mihaela Ioana Popovici ,  Ludovic Goux ,  Gouri Sankar Kar

    IPC: H01L49/02 ,  H01L27/108 ,  H01L21/02 ,  H01L21/285

    Abstract: The disclosed technology relates to a structure for use in a metal-insulator-metal capacitor. In one aspect, the structure comprises a bottom electrode formed of a Ru layer. The Ru layer has a top surface characterized by a grazing incidence X-ray diffraction spectrum comprising a first intensity and a second intensity, the first intensity corresponding to a diffracting plane of Miller indices (0 0 2) being larger than the second intensity corresponding to a diffracting plane of Miller indices (1 0 1). The structure further comprises an interlayer on the top surface of the Ru layer, the interlayer being formed of an oxide of Sr and Ru having a cubic lattice structure, and a dielectric layer on the interlayer, the dielectric layer being formed of an oxide of Sr and Ti.

    Switching device with active portion configured to switch between insulating state and conducting state
    9.
    发明授权
    Switching device with active portion configured to switch between insulating state and conducting state 有权

    公开(公告)号：US10680597B2

    公开(公告)日：2020-06-09

    申请号：US16414609

    申请日：2019-05-16

    Applicant: IMEC vzw

    Inventor： Daniele Garbin ,  Robin Degraeve ,  Ludovic Goux

    IPC: H03K17/0412 ,  H01L45/00

    Abstract: The disclosed technology generally relates to a switching device and more particularly to a switching device based on an active portion capable of switching from an insulating state to a conductive state. In an aspect, a switching device comprises an active portion interposed between two electrodes and capable of switching from an insulating state to a conducting state when a voltage higher than a threshold value is applied between the two electrodes. The threshold value is lowered by a dielectric permittivity distribution which produces a concentration of electrical field at a location within the active portion. Thus, the switching device may be devoid of a third control electrode.

    INTEGRATED CIRCUIT DEVICES BASED ON METAL ION MIGRATION AND METHODS OF FABRICATING SAME
    10.
    发明申请
    INTEGRATED CIRCUIT DEVICES BASED ON METAL ION MIGRATION AND METHODS OF FABRICATING SAME 审中-公开

    公开(公告)号：US20200075849A1

    公开(公告)日：2020-03-05

    申请号：US16560777

    申请日：2019-09-04

    Applicant: IMEC vzw

    Inventor： Ludovic Goux

    IPC: H01L45/00 ,  C23C16/455 ,  C23C16/04

    Abstract: The disclosed technology generally relates to integrated circuit (IC) devices and more particularly to IC devices based on metal ion migration, and to manufacturing of the IC devices. In one aspect, a method of manufacturing an integrated electronic circuit, which includes at least one component based on metal ion migration and reduction, allows improved control of an amount of the metal which is incorporated into the component. This amount is produced from a metal supply layer and transferred into a container selectively with respect to the rest of the component. The container is configured as part of an electrolyte portion or active electrode in the final component. The method is compatible with two-dimensional and three-dimensional configurations of the component.

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