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公开(公告)号:US11231731B2
公开(公告)日:2022-01-25
申请号:US16455929
申请日:2019-06-28
Applicant: Intel Corporation
Inventor: Sriram R. Vangal , Jayanth Mallanayakanahalli Devaraju , Vivek De , Robert Milstrey , Stephen H. Gunther
IPC: G06F1/3203 , G06F1/28 , G05F1/46 , G06F16/901 , G06F16/90
Abstract: In one embodiment, a processor includes a minimum energy point (MEP) controller to: generate a change in thermal tracking information, based at least in part on prior and current thermal information; generate a change in activity tracking information, based at least in part on prior activity information and current activity information; and determine a MEP performance state based at least in part on the change in thermal tracking information and the change in activity tracking information. Other embodiments are described and claimed.
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12.
公开(公告)号:US10958079B2
公开(公告)日:2021-03-23
申请号:US15939120
申请日:2018-03-28
Applicant: Intel Corporation
Inventor: Xiaosen Liu , Khondker Z. Ahmed , Vivek K. De , Nachiket V. Desai , Suhwan Kim , Harish K. Krishnamurthy , Turbo Majumder , Krishnan Ravichandran , Christopher Schaef , Vaibhav A. Vaidya , Sriram R. Vangal
Abstract: In one embodiment, an energy harvesting system includes multiple-input-multiple-output switched-capacitor (MIMOSC) circuitry comprising a plurality of switched-capacitor circuit units to receive a plurality of direct current (DC) input voltages at respective input terminals of the switched-capacitor circuit unit, combine the received DC input voltages, and provide the combined DC input voltages at an output terminal of the switched-capacitor circuit unit. The energy harvesting system also includes maximum power point tracking (MPPT) circuitry coupled to switches of the switched-capacitor circuit units of the MIMOSC circuitry. The MPPT circuitry is to provide a plurality of switching signals to the switches of the switched-capacitor circuit units. The MIMOSC circuitry is to provide a plurality of DC output voltages to respective loads based on the switching signals from the MPPT circuitry.
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公开(公告)号:US10018674B2
公开(公告)日:2018-07-10
申请号:US15072280
申请日:2016-03-16
Applicant: Intel Corporation
Inventor: Vinayak Honkote , Sriram R. Vangal
IPC: G01R31/28 , G01R31/3173 , G01R31/317 , G06F1/26 , G06F1/32
CPC classification number: G01R31/3173 , G01R31/31703 , G01R31/31727 , G06F1/26 , G06F1/28 , G06F1/305 , G06F1/3206 , G06F1/3296 , Y02D10/172
Abstract: Described is an apparatus which comprises: a state detector which is operable to detect logic states of zero and one in response to a clock edge; and an error detector coupled to the state detector, wherein the error detector is to detect an error in the detected logic states.
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公开(公告)号:US20170269155A1
公开(公告)日:2017-09-21
申请号:US15072280
申请日:2016-03-16
Applicant: Intel Corporation
Inventor: Vinayak Honkote , Sriram R. Vangal
IPC: G01R31/3173 , G06F1/26 , G06F1/32 , G01R31/317
CPC classification number: G01R31/3173 , G06F1/28 , G06F1/305 , G06F1/3206 , G06F1/3296
Abstract: Described is an apparatus which comprises: a state detector which is operable to detect logic states of zero and one in response to a clock edge; and an error detector coupled to the state detector, wherein the error detector is to detect an error in the detected logic states.
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