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11.发明授权公开(公告)号：US09871682B2
公开(公告)日：2018-01-16
申请号：US14708431
申请日：2015-05-11
Applicant: Intel IP Corporation
Inventor： Andreas Menkhoff
CPC classification number: H04L27/10 , H03C5/00 , H03M7/00 , H04L7/0029 , H04L27/20 , H04L27/361
Abstract: In a method for determining an interpolated complex valued sample, a radial component of the interpolated sample is determined using information on a radial component and information on of a phase component of a first complex valued sample and of a second complex valued sample.
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公开(公告)号：US09847676B2
公开(公告)日：2017-12-19
申请号：US14039996
申请日：2013-09-27
Applicant: Intel IP Corporation
Inventor： Paolo Madoglio , Georgios Palaskas , Bernd-Ulrich Klepser , Andreas Menkhoff , Zdravko Boos , Andreas Boehme , Michael Bruennert
CPC classification number: H02J50/20 , H02J7/025 , H02J17/00 , H02J50/90 , H04B1/0475 , H04L27/361 , H04W52/0251 , H04W52/028 , H04W52/52 , Y02D70/00 , Y02D70/40
Abstract: This document discusses apparatus and methods for reducing energy consumption of digital-to-time converter (DTC) based transmitters. In an example, a wireless device can include a digital-to-time converter (DTC) configured to receive phase information from a baseband processor and to provide a first modulation signal for generating a wireless signal, and a detector configured to detect an operating condition of the wireless device and to adjust a parameter of the DTC in response to a change in the operating condition.
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公开(公告)号：US20150280690A1
公开(公告)日：2015-10-01
申请号：US14631937
申请日：2015-02-26
Applicant: Intel IP Corporation
Inventor： Andreas Menkhoff
IPC: H03H17/02
CPC classification number: H03H17/0248 , H03H17/0657 , H03H17/0664
Abstract: A filter having an impulse response including a first partial impulse response and a second partial impulse response includes a supplementary filter having a supplementary impulse response. A first filter has the first partial impulse response using an output of the supplementary filter as an input and a second filter has the second partial impulse response using an output of the supplementary filter as an input.
Abstract translation: 具有包括第一部分脉冲响应和第二部分脉冲响应的脉冲响应的滤波器包括具有补充脉冲响应的补充滤波器。 第一滤波器具有使用辅助滤波器的输出作为输入的第一部分脉冲响应，并且第二滤波器具有使用补充滤波器的输出作为输入的第二部分脉冲响应。
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公开(公告)号：US10904066B2
公开(公告)日：2021-01-26
申请号：US16508411
申请日：2019-07-11
Applicant: Intel IP Corporation
Inventor： Andreas Menkhoff
Abstract: An apparatus for generating a radio frequency signal is provided. The apparatus includes a modulator configured to generate the radio frequency signal based on an input signal. Further, the apparatus includes a controller configured to control the modulator to generate the radio frequency signal using polar modulation, if the input signal has a first characteristic. The controller is configured to control the modulator to generate the radio frequency signal using quadrature modulation, if the input signal has a different second characteristic.
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公开(公告)号：US20180287563A1
公开(公告)日：2018-10-04
申请号：US15474186
申请日：2017-03-30
Applicant: Intel IP Corporation
Inventor： Stephan Henzler , Andreas Menkhoff , Thomas Eichler , Wolfgan Walthes , Alexander Belitzer , Yifan Wang
Abstract: An envelope tracking system for controlling a power amplifier supply voltage includes envelope circuitry and a feed forward digital to analog converter (DAC) circuitry. The envelope circuitry is configured to generate a target envelope signal based on a selected power amplifier supply voltage. The feed forward DAC circuitry includes a voltage source circuitry and a selector circuitry. The voltage source circuitry is configured to generate a plurality of voltages. The selector circuitry is configured to select one of the plurality of voltages based at least on the target envelope signal. The feed forward DAC circuitry is configured to provide the selected voltage to a supply voltage input of a power amplifier that amplifies a radio frequency (RF) transmit signal.
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Patent Agency Ranking
16.发明申请公开(公告)号：US20180006606A1
公开(公告)日：2018-01-04
申请号：US15609041
申请日：2017-05-31
Applicant: Intel IP Corporation
Inventor： Andreas Menkhoff , Zdravko Boos
CPC classification number: H03D7/16 , G06F1/022 , H03B21/02 , H03D7/163 , H03J1/0033 , H04B1/005 , H04B1/406
Abstract: A radio frequency signal synthesizer circuit includes a digital to analog converter configured to generate an analog output signal for each clock cycle of a clock signal to provide the radio frequency signal and a controlled oscillator to generate the clock signal. The controlled oscillator is configured to vary a cycle time of the clock signal for a radio frequency signal in a first frequency range in a first operation mode or to maintain a constant cycle time for a radio frequency signal in a second frequency range in a second operation mode, the second frequency range being different than the first frequency range.
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公开(公告)号：US20170094606A1
公开(公告)日：2017-03-30
申请号：US14872015
申请日：2015-09-30
Applicant: Intel IP Corporation
Inventor： Andreas Menkhoff
CPC classification number: H04W52/0287 , H04W52/0209 , H04W52/0229 , H04W52/028 , H04W52/32 , Y02D70/00 , Y02D70/1242 , Y02D70/1262 , Y02D70/142 , Y02D70/144 , Y02D70/166
Abstract: Described herein are architectures, platforms and methods for implementing scalable power in a wireless device. Multiple radio access technology architectures running different operating clock frequencies are supported by providing a scaled static clock frequency and dynamic clock frequencies by dynamically switching parallel paths of processing resources.
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公开(公告)号：US09450622B2
公开(公告)日：2016-09-20
申请号：US14856781
申请日：2015-09-17
Applicant: Intel IP Corporation
Inventor： Andreas Menkhoff , Andreas Langer , Staffan Sahlin
CPC classification number: H04B1/0475 , H03F1/3241 , H04B2001/0416 , H04B2001/0425 , H04W72/082
Abstract: A circuit for generating a radio frequency signal includes an amplifier configured to provide a radio frequency signal, the radio frequency signal being based on a baseband signal and a power supply configured to provide a variable supply voltage to the amplifier. A predistortion circuit is configured to modify the baseband signal; and a control circuit configured to control an operation mode of the predistortion circuit depending on a bandwidth of a radius of the baseband signal.
Abstract translation: 用于产生射频信号的电路包括：放大器，被配置为提供射频信号，所述射频信号基于基带信号;以及电源，被配置为向所述放大器提供可变电源电压。 预失真电路被配置为修改基带信号; 以及控制电路，被配置为根据基带信号的半径的带宽来控制预失真电路的操作模式。
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19.发明申请Circuit, A Method and a Synthesizer for Generating a Synthesized Signal with a Selectable Frequency 有权用于产生具有可选择频率的合成信号的电路，方法和合成器公开(公告)号：US20150171848A1
公开(公告)日：2015-06-18
申请号：US14546127
申请日：2014-11-18
Applicant: Intel IP Corporation
Inventor： Michael Bruennert , Andreas Menkhoff
IPC: H03K5/14
CPC classification number: H03K5/14
Abstract: A circuit for generating a oscillating with a selectable frequency, comprises a delay generator configured to identify a first time instant, the first time instant being delayed with respect to a signal edge of a clock signal oscillating with a predetermined clock frequency. A delay element is configured to provide a signal edge, the signal edge being delayed with respect to the first time instant such that the signal edge is provided at a second time instant corresponding to a signal edge of the synthesized signal.
Abstract translation: 用于产生具有可选频率的振荡的电路包括延迟发生器，其被配置为识别第一时刻，所述第一时刻相对于以预定时钟频率振荡的时钟信号的信号边缘被延迟。 延迟元件被配置为提供信号边缘，信号边缘相对于第一时刻被延迟，使得在对应于合成信号的信号边缘的第二时刻提供信号边缘。
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20.发明授权公开(公告)号：US10432173B2
公开(公告)日：2019-10-01
申请号：US15811851
申请日：2016-06-08
Applicant: Intel IP Corporation
Inventor： Thomas Bauernfeind , Andreas Menkhoff , Michael Bruennert
Abstract: An apparatus for shifting a digital signal having a first sample rate by a shift time to provide a shifted signal having a second sample rate is provided. The apparatus includes a sample rate converter configured to provide a value of an interpolated signal at a compensated sample time as a sample of the shifted signal, the interpolated signal being based on the digital signal. The sample rate converter is configured to modify a time interval between a sample time of the digital signal and the compensated sample time based on the shift time.
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