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公开(公告)号:US20200249809A1
公开(公告)日:2020-08-06
申请号:US16267984
申请日:2019-02-05
Applicant: International Business Machines Corporation
Inventor: Yin Xia , Dong Chen , Huai Ying Xia , Ya Ju Yan , Li Hong Qi , Zhou Kun
IPC: G06F3/0485 , G06F3/0481
Abstract: Embodiments of the present invention include computer-implemented methods, computer systems, and computer program products for displaying messages based on categories. According to an embodiment, a computer-implemented method comprises: receiving, by a device operatively coupled to one or more processors, a request for displaying messages for a user based on categories; calculating, by the device, an importance score of each of the messages to the user; classifying, by the device, the messages into the categories based on calculated importance scores of the messages; and displaying, by the device, the messages for the user based on the categories.
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公开(公告)号:US10609277B2
公开(公告)日:2020-03-31
申请号:US15906551
申请日:2018-02-27
Applicant: International Business Machines Corporation
Inventor: Dong Chen , Ling Chen , Yuan-Shyang Lee , Tao Liu , Jie Peng , Yu Lin Zhai
Abstract: Methods and computer program products for determining one or more settings of a camera apparatus are provided. The methods include obtaining one or more parameters of the camera apparatus and determining one or more settings of the camera apparatus using the one or more parameters and an image repository. The image repository may include images with image parameters associated with the images, which may be correlated with the one or more parameters of the camera apparatus, and the images may also have an associated rating attribute. One or more images may be identified for inclusion in a subset of images, based on an image's image parameters and/or based on an image's rating attribute. The camera settings of one image of the subset of images, corresponding to the settings used to create the one image, may be used to automatically adjust the one or more settings of the camera apparatus.
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公开(公告)号:US20190272469A1
公开(公告)日:2019-09-05
申请号:US16417924
申请日:2019-05-21
Applicant: International Business Machines Corporation
Inventor: Aaron Baughman , Bridget Briana Beamon , Dong Chen , Peter Kenneth Malkin
IPC: G06N5/02
Abstract: A method, system, and non-transitory compute readable medium for hidden evidence correlation and causation linking including a forecasting device configured to forecast hidden evidence found in relation to a user input in hidden cycle measurements into future forecasted cycle measurements, where the forecasted hidden cycles are transformed into an amplitude versus frequency histogram with each histogram being compared to each other histogram and determined if causation is a candidate, and if causation is a candidate, a probability density function is applied to produce a degree of causation of a causation link for the hidden evidence in relation to the user input.
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公开(公告)号:US20190199653A1
公开(公告)日:2019-06-27
申请号:US15855447
申请日:2017-12-27
Applicant: International Business Machines Corporation
Inventor: Sameer Kumar , Philip Heidelberger , Dong Chen , Yutaka Sugawara , Robert M. Senger , Burkhard Steinmacher-Burow
IPC: H04L12/861 , H04L12/879 , H04L29/08 , G06F9/54
Abstract: A shared memory maintained by sender processes stores a sequence number counter per destination process. A sender process increments the sequence number counter in the shared memory in sending a message to a destination process. The sender process sends a data packet comprising the message and at least a sequence number specified by the sequence number counter. All of the sender processes share a sequence number counter per destination process, each of the sender processes incrementing the sequence number counter in sending a respective message. Receiver processes run on the hardware processor, each of the receiver processes maintaining a local memory counter on the memory, the local memory counter associated with a sending node. The local memory counter stores a sequence number of a message received from the sending node. The receiver process delivers incoming data packets ordered by sequence numbers of the data packets.
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公开(公告)号:US10334035B2
公开(公告)日:2019-06-25
申请号:US15067221
申请日:2016-03-11
Applicant: International Business Machines Corporation
Inventor: Dong Chen , Xiao Hua Shen , Ling Chen , Li Ni Zhang , Min Min Zhou
IPC: G06F15/173 , H04L29/08 , H04L12/803
Abstract: A method for load balancing is provided based on a user behavior pattern. The user behavior pattern is generated from historical user data to predict next operations a user would perform. Further, the user behavior pattern is bound to resource consumption, and a user and resource type is linked by a weighted value. Load balancing strategies are employed according to the weighted value of the user other than using connection count.
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公开(公告)号:US09954760B2
公开(公告)日:2018-04-24
申请号:US15420588
申请日:2017-01-31
Applicant: International Business Machines Corporation
Inventor: Dong Chen , Noel A. Eisley , Philip Heidelberger
IPC: G06F15/173 , H04L12/701 , H04L12/721
CPC classification number: H04L45/00 , G06F15/17387 , H04L45/06
Abstract: A method, system and computer program product are disclosed for routing data packet in a computing system comprising a multidimensional torus compute node network including a multitude of compute nodes, and an I/O node network including a plurality of I/O nodes. In one embodiment, the method comprises assigning to each of the data packets a destination address identifying one of the compute nodes; providing each of the data packets with a toio value; routing the data packets through the compute node network to the destination addresses of the data packets; and when each of the data packets reaches the destination address assigned to said each data packet, routing said each data packet to one of the I/O nodes if the toio value of said each data packet is a specified value. In one embodiment, each of the data packets is also provided with an ioreturn value used to route the data packets through the compute node network.
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公开(公告)号:US20180091442A1
公开(公告)日:2018-03-29
申请号:US15279805
申请日:2016-09-29
Applicant: International Business Machines Corporation
Inventor: Dong Chen , PHILIP HEIDELBERGER , CRAIG STUNKEL
IPC: H04L12/933 , H04L12/935
Abstract: An apparatus includes a collective switch hardware architecture, including an input arrangement circuit including multiple input ports and multiple outputs. The input arrangement circuit routes its multiple input ports to selected ones of its outputs. The collective switch hardware architecture includes collective reduction logic coupled to the multiple outputs of the input arrangement circuit and having multiple outputs. The collective reduction logic includes ALU(s) and arbitration and control circuity. The ALU(s) and arbitration and control circuitry support multiple simultaneous collective operations from different collective classes, and support arbitrary input port and output port mapping to different collective classes. The collective switch hardware architecture further includes an output arrangement circuit including a multiple inputs coupled to the multiple outputs of the collective reduction logic and including multiple output ports. The output arrangement circuit is configured to route its multiple inputs to selected ones of its output ports.
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公开(公告)号:US09740699B1
公开(公告)日:2017-08-22
申请号:US15263659
申请日:2016-09-13
Applicant: International Business Machines Corporation
Inventor: Dong Chen , Ling Chen , Li Ni Zhang , Min Min Zhou
IPC: G06F17/30
CPC classification number: G06F17/30082 , G06F17/30115 , G06F17/30194
Abstract: A system, method and program product for creating files in a cloud environment having a storage cluster. As system is provided having a command processor that parses an inputted file creation command and determines whether a location tag is specified for a file being created and stored in the storage cluster; and a location limitation processor that, in response to the location tag being specified: retrieves a creation limitation profile associated with the location tag; causes the file to be created with a location limitation in the storage cluster based on the creation limitation profile; and stores an identifier for the creation limitation profile in an extended inode structure.
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公开(公告)号:US20160011996A1
公开(公告)日:2016-01-14
申请号:US14701371
申请日:2015-04-30
Applicant: International Business Machines Corporation
Inventor: Sameh Asaad , Ralph E. Bellofatto , Michael A. Blocksome , Matthias A. Blumrich , Peter Boyle , Jose R. Brunheroto , Dong Chen , Chen-Yong Cher , George L. Chiu , Norman Christ , Paul W. Coteus , Kristan D. Davis , Gabor J. Dozsa , Alexandre E. Eichenberger , Noel A. Eisley , Matthew R. Ellavsky , Kahn C. Evans , Bruce M. Fleischer , Thomas W. Fox , Alan Gara , Mark E. Giampapa , Thomas M. Gooding , Michael K. Gschwind , John A. Gunnels , Shawn A. Hall , Rudolf A. Haring , Philip Heidelberger , Todd A. Inglett , Brant L. Knudson , Gerard V. Kopcsay , Sameer Kumar , Amith R. Mamidala , James A. Marcella , Mark G. Megerian , Douglas R. Miller , Samuel J. Miller , Adam J. Muff , Michael B. Mundy , John K. O'Brien , Kathryn M. O'Brien , Martin Ohmacht , Jeffrey J. Parker , Ruth J. Poole , Joseph D. Ratterman , Valentina Salapura , David L. Satterfield , Robert M. Senger , Burkhard Steinmacher-Burow , William M. Stockdell , Craig B. Stunkel , Krishnan Sugavanam , Yutaka Sugawara , Todd E. Takken , Barry M. Trager , James L. Van Oosten , Charles D. Wait , Robert E. Walkup , Alfred T. Watson , Robert W. Wisniewski , Peng Wu
CPC classification number: G06F13/287 , G06F9/06 , G06F9/3004 , G06F9/30047 , G06F9/3885 , G06F12/0811 , G06F12/0831 , G06F12/0862 , G06F12/0864 , G06F12/1027 , G06F15/17381 , G06F15/17387 , G06F15/76 , G06F15/8069 , G06F2212/1016 , G06F2212/602 , G06F2212/6022 , G06F2212/6024 , G06F2212/6032 , Y02D10/13 , Y02D10/14
Abstract: A Multi-Petascale Highly Efficient Parallel Supercomputer of 100 petaflop-scale includes node architectures based upon System-On-a-Chip technology, where each processing node comprises a single Application Specific Integrated Circuit (ASIC). The ASIC nodes are interconnected by a five dimensional torus network that optimally maximize the throughput of packet communications between nodes and minimize latency. The network implements collective network and a global asynchronous network that provides global barrier and notification functions. Integrated in the node design include a list-based prefetcher. The memory system implements transaction memory, thread level speculation, and multiversioning cache that improves soft error rate at the same time and supports DMA functionality allowing for parallel processing message-passing.
Abstract translation: 100 petaflop规模的多千兆高效并行超级计算机包括基于片上系统技术的节点架构,其中每个处理节点包括单个专用集成电路(ASIC)。 ASIC节点通过五维环面网络互连,最优化节点之间的分组通信的吞吐量并最小化等待时间。 网络实现集体网络和提供全局障碍和通知功能的全球异步网络。 集成在节点设计中包括一个基于列表的预取器。 存储系统实现事务存储器,线程级别推测和多重切换缓存,同时提高软错误率,并支持DMA功能,允许并行处理消息传递。
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公开(公告)号:US20250045190A1
公开(公告)日:2025-02-06
申请号:US18363777
申请日:2023-08-02
Applicant: International Business Machines Corporation
Inventor: Dong Chen , Jia Chan Shen , Ju Ling Liu , Ting Ting Zhan
IPC: G06F11/36
Abstract: A computer-implemented method, a computer system, and a computer program product for generating an automation test script. Existing testing documents of a product under test can be acquired. A testing topology describing steps, containers, elements and actions of the test can be generated by extracting keywords in the existing test documents, wherein each element defines a user interface (UI) element of the product, each action defines an action attribute for an associated UI element, each container defines an operation area containing one or more UI elements, and each step defines one or more operations for one or more actions associated with one or more UI elements. An automation test script for the product can be generated based on the testing topology.
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