公开(公告)号：US11105856B2

公开(公告)日：2021-08-31

申请号：US16189295

申请日：2018-11-13

Applicant: International Business Machines Corporation

Inventor： Emily A. Ray ,  Emmanuel Yashchin ,  Peilin Song ,  Kevin G. Stawiasz ,  Barry Linder ,  Alan Weger ,  Keith A. Jenkins ,  Raphael P. Robertazzi ,  Franco Stellari ,  James Stathis

IPC: G06F11/22 ,  G01R31/3193 ,  G01R31/319

Abstract: Methods and systems of detecting chip degradation are described. A processor may execute a test on a device at a first time, where the test includes executable instructions for the device to execute a task under specific conditions relating to a performance attribute. The processor may receive performance data indicating a set of outcomes from the task executed by the device during the test. The processor may determine a first value of a parameter of the performance attribute based on the identified subset. The processor may compare the first value with a second value of the parameter of the performance attribute. The second value is based on an execution of the test on the device at a second time. The processor may determine a degradation status of the device based on the comparison of the first value with the second value.

公开(公告)号：US10902735B2

公开(公告)日：2021-01-26

申请号：US15808256

申请日：2017-11-09

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： James R. Kozloski ,  Shikhar Kwatra ,  Rosanna S. Mannan ,  Emily A. Ray

IPC: G09B5/02 ,  G09B19/00 ,  G06N20/00 ,  G09B7/00 ,  G09B5/00 ,  G06N3/00

Abstract: A reward learning system includes a user interface configured to receive modes of user information related to a state of the user. A cognitive computing system includes a reward system. The reward system includes a dynamically upgraded profile model of the user which is updated in accordance with the user information related to the state. The reward system is updated by machine learning employing feedback from user responses measured by the user interface and searched information by the cognitive computing system. The reward system includes an increasing reward protocol based on learned user preferences and responses and rewarded in accordance with user achievements.

公开(公告)号：US20190172564A1

公开(公告)日：2019-06-06

申请号：US15831426

申请日：2017-12-05

Applicant: International Business Machines Corporation

Inventor： Rachita Chandra ,  Vijay S. Iyengar ,  Dmitriy A. Katz ,  Karthikeyan Natesan Ramamurthy ,  Emily A. Ray ,  Moninder Singh ,  Dennis Wei ,  Gigi Y. C. Yuen-Reed ,  Kevin N. Tran

IPC: G16H10/60 ,  G16H50/30 ,  G06N99/00 ,  G06F17/30 ,  G06N5/02

Abstract: A system may predict costs for a set of members by building and using a predictive pipeline. The pipeline may be built using a set of historical data for training members. A set of member-level features can be identified by performing empirical testing on the set of historical data. The trained configurable predictive pipeline can generate a set of predictive data for each member, using historical test data for a set of testing members. The system can then generate a predictive report for each set of predictive data.

公开(公告)号：US10969863B2

公开(公告)日：2021-04-06

申请号：US16406735

申请日：2019-05-08

Applicant: International Business Machines Corporation

Inventor： Emily A. Ray ,  Nizar Lethif ,  Kuntal Dey

IPC: G06F3/0484 ,  G06F3/16 ,  G06F3/0485 ,  G06F3/01 ,  G09G5/00 ,  G06F3/048

Abstract: A method of operating a configurable gaze tracking system includes initializing a plurality of sensors by determining positional information of the sensors, wherein the sensors establish a virtual framework, initializing a plurality of target objects by determining positional information of the target objects within the virtual framework, determining a current user using data output by the sensors, determining a gaze of the current user, matching the gaze to one of the target objects in the virtual framework, wherein a target object matched to the gaze is a current target object, and activating the current target object to receive input.

公开(公告)号：US10756977B2

公开(公告)日：2020-08-25

申请号：US15987048

申请日：2018-05-23

Applicant: International Business Machines Corporation

Inventor： Joana Sofia Branquinho Teresa Maria ,  Mary E. Helander ,  Nizar Lethif ,  Emily A. Ray ,  Kush R. Varshney ,  Hemank Lamba

IPC: G06F15/177 ,  H04L12/24

Abstract: Methods and systems for determining a time dependent relevancy score of an agent node among an evolving heterogeneous network are described. A processor may expand the heterogeneous network by generating temporal heterogeneous networks representing states of the heterogeneous network at different times. The processor may extract a set of agent nodes from each temporal heterogeneous network and may generate a relationship network based on the extracted agent nodes for each temporal heterogeneous network. The processor may remove the agent node from the temporal heterogeneous network to generate a conditional relationship network excluding the removed agent node. The processor may determine a relevancy score for the agent node based on the corresponding relationship network and the conditional relationship network. Each relevancy score for the agent node may correspond to a temporal heterogeneous network and may indicate an impact of removing the agent node from the corresponding temporal heterogeneous network.

公开(公告)号：US20190363937A1

公开(公告)日：2019-11-28

申请号：US15987048

申请日：2018-05-23

Applicant: International Business Machines Corporation

Inventor： Joana Sofia Branquinho Teresa Maria ,  Mary E. Helander ,  Nizar Lethif ,  Emily A. Ray ,  Kush R. Varshney ,  Hemank Lamba

IPC: H04L12/24

Abstract: Methods and systems for determining a time dependent relevancy score of an agent node among an evolving heterogeneous network are described. A processor may expand the heterogeneous network by generating temporal heterogeneous networks representing states of the heterogeneous network at different times. The processor may extract a set of agent nodes from each temporal heterogeneous network and may generate a relationship network based on the extracted agent nodes for each temporal heterogeneous network. The processor may remove the agent node from the temporal heterogeneous network to generate a conditional relationship network excluding the removed agent node. The processor may determine a relevancy score for the agent node based on the corresponding relationship network and the conditional relationship network. Each relevancy score for the agent node may correspond to a temporal heterogeneous network and may indicate an impact of removing the agent node from the corresponding temporal heterogeneous network.

公开(公告)号：US20180322025A1

公开(公告)日：2018-11-08

申请号：US16035032

申请日：2018-07-13

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Keith A. Jenkins ,  Barry P. Linder ,  Emily A. Ray ,  Raphael P. Robertazzi ,  Peilin Song ,  James H. Stathis ,  Kevin G. Stawiasz ,  Franco Stellari ,  Alan J. Weger ,  Emmanuel Yashchin

IPC: G06F11/22 ,  G06F11/24 ,  G06F11/00

CPC classification number: G06F11/2236 ,  G06F11/008 ,  G06F11/2273 ,  G06F11/24 ,  G06F11/263

Abstract: A method and system are provided for chip testing. The method includes selectively deploying a chip for future use or discarding the chip to prevent the future use, responsive to a stress history of the chip determined using a non-destructive test procedure. The test procedure includes ordering each of a plurality of functional patterns by a respective minimum operating period corresponding thereto. The test procedure further includes ranking each of the plurality of patterns based on at least one preceding available pattern to provide a plurality of pattern ranks. The test procedure also includes calculating a sum by summing the plurality of pattern ranks. The sum calculated during an initial performance of the test procedure is designated as a baseline, and the sum calculated during a subsequent performance of the test procedure is compared to a threshold derived from the baseline to determine the stress history of the chip.

公开(公告)号：US20170329685A1

公开(公告)日：2017-11-16

申请号：US15156136

申请日：2016-05-16

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Keith A. Jenkins ,  Barry P. Linder ,  Emily A. Ray ,  Raphael P. Robertazzi ,  Peilin Song ,  James H. Stathis ,  Kevin G. Stawiasz ,  Franco Stellari ,  Alan J. Weger ,  Emmanuel Yashchin

IPC: G06F11/22 ,  G06F11/263

CPC classification number: G06F11/2236 ,  G06F11/008 ,  G06F11/24

Abstract: A method and system are provided for chip testing. The method includes ascertaining a baseline for a functioning chip with no stress history by performing a non-destructive test procedure on the functioning chip. The method further includes repeating the test procedure on a chip under test using a threshold derived from the baseline as a reference point to determine a stress history of the chip under test. The test procedure includes ordering each of a plurality of functional patterns by a respective minimum operating period corresponding thereto, ranking each pattern based on at least one preceding available pattern to provide a plurality of pattern ranks, and calculating a sum by summing the pattern ranks. The sum calculated by the ascertaining step is designated as the baseline, and the sum calculated by the repeating step is compared to the threshold to determine the stress history of the chip under test.