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公开(公告)号：US10444429B1
公开(公告)日：2019-10-15
申请号：US16239864
申请日：2019-01-04
Applicant: International Business Machines Corporation
Inventor： Yves Martin , Jason S. Orcutt , Tymon Barwicz , William Green
Abstract: Techniques are provided for single edge coupling of chips with integrated waveguides. For example, a package structure includes a first chip with a first critical edge, and a second chip with a second critical edge. The first and second chips include integrated waveguides with end portions that terminate on the first and second critical edges. The second chip includes a signal reflection structure that is configured to reflect an optical signal propagating in one or more of the integrated waveguides of the second chip. The first and second chips are edge-coupled at the first and second critical edges such that the end portions of the integrated waveguides of the first and second chips are aligned to each other, and wherein all signal input/output between the first and second chips occurs at the single edge-coupled interface.
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公开(公告)号：US20140290909A1
公开(公告)日：2014-10-02
申请号：US14301623
申请日：2014-06-11
Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventor： Yves Martin , Theodore G Van Kessel
IPC: F28F3/12
CPC classification number: F28F3/12 , F28D2021/0031 , F28F2230/00 , F28F2255/02 , H01L23/427 , H01L2924/0002 , Y10T29/53113 , H01L2924/00
Abstract: A method for cooling a computer uses thermal coupling for conveying heat from powered components of an electronic system. A fluid heat-exchanger is attached to the surface of the electronic system and filled with fluid coolant. A vacuum is applied between the heat-exchanger and the surface to seal the heat-exchanger to the electronic system. The fluid coolant is circulated through the heat-exchanger to convey heat from the fluid to an external cooling apparatus.
Abstract translation: 用于冷却计算机的方法使用热耦合来从电子系统的有源部件传送热量。 流体热交换器附接到电子系统的表面并且填充有流体冷却剂。 在热交换器和表面之间施加真空以将热交换器密封到电子系统。 流体冷却剂循环通过热交换器以将热量从流体传送到外部冷却装置。
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公开(公告)号：US20250069887A1
公开(公告)日：2025-02-27
申请号：US18452963
申请日：2023-08-21
Applicant: International Business Machines Corporation
Inventor： Eric Zhang , Jason S. Orcutt , Jared Barney Hertzberg , Sami Rosenblatt , Yves Martin
Abstract: A method for performing a calibration process comprises performing laser annealing operations on a set of test superconducting tunnel junction devices using different combinations of laser power and anneal time, determining junction resistance shifts of the test superconducting tunnel junction devices as a result of the laser annealing operations, and utilizing the determined junction resistance shifts of the test superconducting tunnel junction to determine calibration data for configuring laser annealing operations for laser tuning superconducting tunnel junction devices corresponding to the test superconducting tunnel junction devices.
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公开(公告)号：US11162890B2
公开(公告)日：2021-11-02
申请号：US16732511
申请日：2020-01-02
Applicant: International Business Machines Corporation
Inventor： Yves Martin , William Green , Theodore G. van Kessel
Abstract: A sensor housing apparatus includes a housing having an enclosure and outer assembly, at least one flow path extending through the housing, a gas sensor disposed in the enclosure and a thermal mass. The thermal mass is mounted within the enclosure in thermal communication with the gas sensor, and is configured to transfer thermal energy from the gas sensor to an ambient environment surrounding the housing and minimize temperature gradients adjacent the gas sensor.
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公开(公告)号：US10901147B2
公开(公告)日：2021-01-26
申请号：US16565960
申请日：2019-09-10
Applicant: International Business Machines Corporation
Inventor： Yves Martin , Jason S. Orcutt , Tymon Barwicz , William Green
Abstract: Techniques are provided for single edge coupling of chips with integrated waveguides. For example, a package structure includes a first chip with a first critical edge, and a second chip with a second critical edge. The first and second chips include integrated waveguides with end portions that terminate on the first and second critical edges. The second chip includes a signal reflection structure that is configured to reflect an optical signal propagating in one or more of the integrated waveguides of the second chip. The first and second chips are edge-coupled at the first and second critical edges such that the end portions of the integrated waveguides of the first and second chips are aligned to each other, and wherein all signal input/output between the first and second chips occurs at the single edge-coupled interface.
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Patent Agency Ranking
公开(公告)号：US20200003952A1
公开(公告)日：2020-01-02
申请号：US16565960
申请日：2019-09-10
Applicant: International Business Machines Corporation
Inventor： Yves Martin , Jason S. Orcutt , Tymon Barwicz , William Green
Abstract: Techniques are provided for single edge coupling of chips with integrated waveguides. For example, a package structure includes a first chip with a first critical edge, and a second chip with a second critical edge. The first and second chips include integrated waveguides with end portions that terminate on the first and second critical edges. The second chip includes a signal reflection structure that is configured to reflect an optical signal propagating in one or more of the integrated waveguides of the second chip. The first and second chips are edge-coupled at the first and second critical edges such that the end portions of the integrated waveguides of the first and second chips are aligned to each other, and wherein all signal input/output between the first and second chips occurs at the single edge-coupled interface.
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公开(公告)号：US20250085310A1
公开(公告)日：2025-03-13
申请号：US18244566
申请日：2023-09-11
Applicant: International Business Machines Corporation
Inventor： Eric Zhang , Jason S. Orcutt , Yves Martin
Abstract: A system comprises a prober unit, and a control unit. The prober unit comprises electrical probes. The control unit configured to: cause the prober unit to make contact between the electrical probes and contact pads of a target device; cause the prober unit to increment a contact overdrive by a specified amount to increase a contact pressure between the electrical probes and the contact pads of the target device; measure a contact resistance between the electrical probes and the contact pads of the target device, subsequent to incrementing the contact overdrive; compare the measured contact resistance with a contact resistance threshold; and determine whether to perform an electrical characterization measurement of the target device, based on a result of comparing the measured contact resistance with the contact resistance threshold.
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18.发明申请公开(公告)号：US20250072297A1
公开(公告)日：2025-02-27
申请号：US18236380
申请日：2023-08-21
Applicant: International Business Machines Corporation
Inventor： Russell A. Budd , Jason S. Orcutt , Eric Zhang , Yves Martin
Abstract: An apparatus comprises optical apparatus, and electrical characterization apparatus. The optical apparatus and the electrical characterization apparatus comprise an integrated configuration to perform laser annealing operations for tuning junction resistances of superconducting tunnel junction devices on a quantum chip, and to perform in-situ resistance measurements to measure the junction resistances of the superconducting tunnel junction devices on the quantum chip.
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公开(公告)号：US20250067967A1
公开(公告)日：2025-02-27
申请号：US18236382
申请日：2023-08-21
Applicant: International Business Machines Corporation
Inventor： Russell A. Budd , Jason S. Orcutt , Eric Zhang , Yves Martin
IPC: G02B21/00 , B23K26/03 , B23K26/06 , B23K26/067 , B23K26/351 , B23K26/70 , G02B21/08 , H10N60/01
Abstract: An optical microscope device comprises an optically integrated configuration of components for imaging a target device within a field of view of the optical microscope device, and for laser annealing the target device by generating a laser beam spot pattern from a laser beam received on an optical fiber from a remote laser source, and for controlling a duration of exposure of the laser beam spot pattern for laser annealing the target device.
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公开(公告)号：US20190391330A1
公开(公告)日：2019-12-26
申请号：US16445623
申请日：2019-06-19
Applicant: International Business Machines Corporation
Inventor： Yves Martin , Jason S. Orcutt , Tymon Barwicz , William Green
Abstract: Techniques are provided for single edge coupling of chips with integrated waveguides. For example, a package structure includes a first chip with a first critical edge, and a second chip with a second critical edge. The first and second chips include integrated waveguides with end portions that terminate on the first and second critical edges. The second chip includes a signal reflection structure that is configured to reflect an optical signal propagating in one or more of the integrated waveguides of the second chip. The first and second chips are edge-coupled at the first and second critical edges such that the end portions of the integrated waveguides of the first and second chips are aligned to each other, and wherein all signal input/output between the first and second chips occurs at the single edge-coupled interface.
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