公开(公告)号：US20200043876A1

公开(公告)日：2020-02-06

申请号：US16520597

申请日：2019-07-24

申请人： Infineon Technologies AG

发明人： Evelyn Napetschnig ,  Wei Cheat Lee ,  Wei Lee Lim ,  Frank Renner ,  Michael Rogalli

IPC分类号： H01L23/00

摘要： A package includes an electronic chip having a pad. The pad is at least partially covered with adhesion enhancing structures. The pad and the adhesion enhancing structures have at least aluminium in common.

公开(公告)号：US20160329263A1

公开(公告)日：2016-11-10

申请号：US15217383

申请日：2016-07-22

申请人： Infineon Technologies AG

发明人： Thomas Detzel ,  Johann Gross ,  Robert Illing ,  Maximilian Krug ,  Sven Gustav Lanzerstorfer ,  Michael Nelhiebel ,  Werner Robl ,  Michael Rogalli ,  Stefan Woehlert

IPC分类号： H01L23/373 ,  H01L21/48

CPC分类号： H01L23/3735 ,  H01L21/2885 ,  H01L21/4882 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device includes a base element and a copper element over the base element. The copper element includes a layer stack having at least two copper layers and at least one intermediate conductive layer of a material different from copper. The at least two copper layers and the at least one intermediate conductive layer are alternately stacked over each other.

摘要翻译： 半导体器件包括在基底元件上的基底元件和铜元件。 铜元件包括具有至少两个铜层的层堆叠和至少一个不同于铜的材料的中间导电层。 所述至少两个铜层和所述至少一个中间导电层彼此交替堆叠。

公开(公告)号：US09385031B2

公开(公告)日：2016-07-05

申请号：US14830766

申请日：2015-08-20

申请人： Infineon Technologies AG

发明人： Michael Rogalli ,  Wolfgang Lehnert

IPC分类号： H01L21/768 ,  H01L21/311 ,  H01L21/02 ,  H01L21/3213 ,  H01L21/027 ,  H01L21/3105

CPC分类号： H01L21/76834 ,  H01L21/02178 ,  H01L21/02205 ,  H01L21/02271 ,  H01L21/0228 ,  H01L21/0272 ,  H01L21/31058 ,  H01L21/31111 ,  H01L21/32134 ,  H01L21/32139 ,  H01L21/76822 ,  H01L21/76829 ,  H01L21/76832

摘要： According to one embodiment, a method for processing a semiconductor device is provided including forming a final metal layer forming a passivation layer over the final metal layer and structuring the passivation layer and the final metal layer to form a patterned metal layer and a patterned passivation layer, wherein the patterned metal layer includes a pad region covered by the patterned passivation layer.

公开(公告)号：US20150357234A1

公开(公告)日：2015-12-10

申请号：US14830766

申请日：2015-08-20

申请人： Infineon Technologies AG

发明人： Michael Rogalli ,  Wolfgang Lehnert

IPC分类号： H01L21/768 ,  H01L21/311 ,  H01L21/3213 ,  H01L21/3105

CPC分类号： H01L21/76834 ,  H01L21/02178 ,  H01L21/02205 ,  H01L21/02271 ,  H01L21/0228 ,  H01L21/0272 ,  H01L21/31058 ,  H01L21/31111 ,  H01L21/32134 ,  H01L21/32139 ,  H01L21/76822 ,  H01L21/76829 ,  H01L21/76832

摘要： According to one embodiment, a method for processing a semiconductor device is provided including forming a final metal layer forming a passivation layer over the final metal layer and structuring the passivation layer and the final metal layer to form a patterned metal layer and a patterned passivation layer, wherein the patterned metal layer includes a pad region covered by the patterned passivation layer.

摘要翻译： 根据一个实施例，提供了一种用于处理半导体器件的方法，包括在最终金属层上形成钝化层的最终金属层，并且构造钝化层和最终金属层以形成图案化的金属层和图案化的钝化层 ，其中所述图案化金属层包括被图案化钝化层覆盖的焊盘区域。