公开(公告)号：US20150179507A1

公开(公告)日：2015-06-25

申请号：US14138158

申请日：2013-12-23

Applicant: Infineon Technologies AG

Inventor： Michael Rogalli ,  Wolfgang Lehnert

IPC: H01L21/768 ,  H01L21/3213 ,  H01L21/02

CPC classification number: H01L21/76834 ,  H01L21/02178 ,  H01L21/02205 ,  H01L21/02271 ,  H01L21/0228 ,  H01L21/0272 ,  H01L21/31058 ,  H01L21/31111 ,  H01L21/32134 ,  H01L21/32139 ,  H01L21/76822 ,  H01L21/76829 ,  H01L21/76832

Abstract: According to one embodiment, a method for processing a semiconductor device is provided including forming a final metal layer forming a passivation layer over the final metal layer and structuring the passivation layer and the final metal layer to form a patterned metal layer and a patterned passivation layer, wherein the patterned metal layer includes a pad region covered by the patterned passivation layer.

Abstract translation: 根据一个实施例，提供了一种用于处理半导体器件的方法，包括在最终金属层上形成钝化层的最终金属层，并且构造钝化层和最终金属层以形成图案化的金属层和图案化的钝化层 ，其中所述图案化金属层包括被图案化钝化层覆盖的焊盘区域。

公开(公告)号：US11424201B2

公开(公告)日：2022-08-23

申请号：US16012341

申请日：2018-06-19

Applicant: Infineon Technologies AG

Inventor： Michael Rogalli ,  Johann Gatterbauer ,  Wolfgang Lehnert ,  Kurt Matoy ,  Evelyn Napetschnig ,  Manfred Schneegans ,  Bernhard Weidgans

IPC: H01L23/00

Abstract: A method of forming an aluminum oxide layer is provided. The method includes providing a metal surface including at least one metal of a group of metals, the group of metals consisting of copper, aluminum, palladium, nickel, silver, and alloys thereof. The method further includes depositing an aluminum oxide layer on the metal surface by atomic layer deposition, wherein a maximum processing temperature during the depositing is 280° C., such that the aluminum oxide layer is formed with a surface having a liquid solder contact angle of less than 40°.

公开(公告)号：US10446469B2

公开(公告)日：2019-10-15

申请号：US15217383

申请日：2016-07-22

Applicant: Infineon Technologies AG

Inventor： Thomas Detzel ,  Johann Gross ,  Robert Illing ,  Maximilian Krug ,  Sven Gustav Lanzerstorfer ,  Michael Nelhiebel ,  Werner Robl ,  Michael Rogalli ,  Stefan Woehlert

IPC: H01L23/00 ,  H01L23/373 ,  H01L23/532 ,  H01L21/288 ,  H01L21/48

Abstract: A semiconductor device includes a base element and a copper element over the base element. The copper element includes a layer stack having at least two copper layers and at least one intermediate conductive layer of a material different from copper. The at least two copper layers and the at least one intermediate conductive layer are alternately stacked over each other.

公开(公告)号：US20180366427A1

公开(公告)日：2018-12-20

申请号：US16012341

申请日：2018-06-19

Applicant: Infineon Technologies AG

Inventor： Michael Rogalli ,  Johann Gatterbauer ,  Wolfgang Lehnert ,  Kurt Matoy ,  Evelyn Napetschnig ,  Manfred Schneegans ,  Bernhard Weidgans

IPC: H01L23/00

Abstract: A method of forming an aluminum oxide layer is provided. The method includes providing a metal surface including at least one metal of a group of metals, the group of metals consisting of copper, aluminum, palladium, nickel, silver, and alloys thereof. The method further includes depositing an aluminum oxide layer on the metal surface by atomic layer deposition, wherein a maximum processing temperature during the depositing is 280° C., such that the aluminum oxide layer is formed with a surface having a liquid solder contact angle of less than 40°.

公开(公告)号：US20170236801A1

公开(公告)日：2017-08-17

申请号：US15455158

申请日：2017-03-10

Applicant: Infineon Technologies AG

Inventor： Michael Rogalli ,  Wolfgang Lehnert

IPC: H01L23/00

CPC classification number: H01L24/85 ,  H01L21/76834 ,  H01L21/76885 ,  H01L24/03 ,  H01L24/05 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/02166 ,  H01L2224/02206 ,  H01L2224/0221 ,  H01L2224/02215 ,  H01L2224/0382 ,  H01L2224/0391 ,  H01L2224/04042 ,  H01L2224/05111 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05147 ,  H01L2224/05164 ,  H01L2224/05184 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05647 ,  H01L2224/05664 ,  H01L2224/05684 ,  H01L2224/32245 ,  H01L2224/4502 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/4847 ,  H01L2224/48811 ,  H01L2224/48824 ,  H01L2224/48839 ,  H01L2224/48847 ,  H01L2224/48864 ,  H01L2224/48884 ,  H01L2224/73265 ,  H01L2224/85007 ,  H01L2224/8501 ,  H01L2224/85238 ,  H01L2224/85375 ,  H01L2224/8591 ,  H01L2924/05042 ,  H01L2924/05432 ,  H01L2924/05442 ,  H01L2924/059 ,  H01L2924/0665 ,  H01L2924/07025 ,  H01L2924/10253 ,  H01L2924/15747 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/00012

Abstract: Various embodiments provide a semiconductor device, including a final metal layer having a top side and at least one sidewall; and a passivation layer disposed over at least part of at least one of the top side and the at least one sidewall of the final metal layer; wherein the passivation layer has a substantially uniform thickness.

公开(公告)号：US09165821B2

公开(公告)日：2015-10-20

申请号：US14138158

申请日：2013-12-23

Applicant: Infineon Technologies AG

Inventor： Michael Rogalli ,  Wolfgang Lehnert

IPC: H01L21/768 ,  H01L21/02 ,  H01L21/3213

CPC classification number: H01L21/76834 ,  H01L21/02178 ,  H01L21/02205 ,  H01L21/02271 ,  H01L21/0228 ,  H01L21/0272 ,  H01L21/31058 ,  H01L21/31111 ,  H01L21/32134 ,  H01L21/32139 ,  H01L21/76822 ,  H01L21/76829 ,  H01L21/76832

Abstract: According to one embodiment, a method for processing a semiconductor device is provided including forming a final metal layer forming a passivation layer over the final metal layer and structuring the passivation layer and the final metal layer to form a patterned metal layer and a patterned passivation layer, wherein the patterned metal layer includes a pad region covered by the patterned passivation layer.

Abstract translation: 根据一个实施例，提供了一种用于处理半导体器件的方法，包括在最终金属层上形成钝化层的最终金属层，并且构造钝化层和最终金属层以形成图案化的金属层和图案化的钝化层 ，其中所述图案化金属层包括被图案化钝化层覆盖的焊盘区域。

公开(公告)号：US12040288B2

公开(公告)日：2024-07-16

申请号：US18236858

申请日：2023-08-22

Applicant: Infineon Technologies AG

Inventor： Harry Walter Sax ,  Johann Gatterbauer ,  Wolfgang Lehnert ,  Evelyn Napetschnig ,  Michael Rogalli

IPC: H01L23/00 ,  H01L21/56 ,  H01L23/31

CPC classification number: H01L23/564 ,  H01L21/56 ,  H01L23/3142 ,  H01L24/03 ,  H01L24/05 ,  H01L2224/0382 ,  H01L2224/05687 ,  H01L2924/365

Abstract: A chip package is provided. The chip package may include at least one chip, an exposed metal region and a metal protection layer structure over the exposed metal region and configured to protect the metal region from oxidation. The protection layer structure includes a low-temperature deposited oxide, and a hydrothermally converted metal oxide layer over the protection layer structure.

公开(公告)号：US10103123B2

公开(公告)日：2018-10-16

申请号：US15455158

申请日：2017-03-10

Applicant: Infineon Technologies AG

Inventor： Michael Rogalli ,  Wolfgang Lehnert

IPC: H01L21/762 ,  H01L23/00

Abstract: Various embodiments provide a semiconductor device, including a final metal layer having a top side and at least one sidewall; and a passivation layer disposed over at least part of at least one of the top side and the at least one sidewall of the final metal layer; wherein the passivation layer has a substantially uniform thickness.

公开(公告)号：US20140110838A1

公开(公告)日：2014-04-24

申请号：US13656777

申请日：2012-10-22

Applicant: INFINEON TECHNOLOGIES AG

Inventor： Michael Rogalli ,  Wolfgang Lehnert

IPC: H01L23/48 ,  H01L23/498 ,  H01L21/768

CPC classification number: H01L24/85 ,  H01L21/76834 ,  H01L21/76885 ,  H01L24/03 ,  H01L24/05 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/02166 ,  H01L2224/02206 ,  H01L2224/0221 ,  H01L2224/02215 ,  H01L2224/0382 ,  H01L2224/0391 ,  H01L2224/04042 ,  H01L2224/05111 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05147 ,  H01L2224/05164 ,  H01L2224/05184 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05647 ,  H01L2224/05664 ,  H01L2224/05684 ,  H01L2224/32245 ,  H01L2224/4502 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/4847 ,  H01L2224/48811 ,  H01L2224/48824 ,  H01L2224/48839 ,  H01L2224/48847 ,  H01L2224/48864 ,  H01L2224/48884 ,  H01L2224/73265 ,  H01L2224/85007 ,  H01L2224/8501 ,  H01L2224/85238 ,  H01L2224/85375 ,  H01L2224/8591 ,  H01L2924/05042 ,  H01L2924/05432 ,  H01L2924/05442 ,  H01L2924/059 ,  H01L2924/0665 ,  H01L2924/07025 ,  H01L2924/10253 ,  H01L2924/15747 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/00012

Abstract: Various embodiments provide a semiconductor device, including a final metal layer having a top side and at least one sidewall; and a passivation layer disposed over at least part of at least one of the top side and the at least one sidewall of the final metal layer; wherein the passivation layer has a substantially uniform thickness.

Abstract translation: 各种实施例提供一种半导体器件，包括具有顶侧和至少一个侧壁的最终金属层; 以及钝化层，设置在所述最终金属层的顶侧和至少一个侧壁中的至少一个的至少一部分上; 其中所述钝化层具有基本均匀的厚度。

公开(公告)号：US11735534B2

公开(公告)日：2023-08-22

申请号：US17333186

申请日：2021-05-28

Applicant: Infineon Technologies AG

Inventor： Harry Walter Sax ,  Johann Gatterbauer ,  Wolfgang Lehnert ,  Evelyn Napetschnig ,  Michael Rogalli

IPC: H01L23/00 ,  H01L23/31 ,  H01L21/56

CPC classification number: H01L23/564 ,  H01L21/56 ,  H01L23/3142 ,  H01L24/03 ,  H01L24/05 ,  H01L2224/0382 ,  H01L2224/05687 ,  H01L2924/365

Abstract: A chip package is provided. The chip package may include at least one chip, an exposed metal region and a metal protection layer structure over the exposed metal region and configured to protect the metal region from oxidation. The protection layer structure includes a low-temperature deposited oxide, and a hydrothermally converted metal oxide layer over the protection layer structure.