公开(公告)号：US10325803B2

公开(公告)日：2019-06-18

申请号：US15969868

申请日：2018-05-03

Applicant: Infineon Technologies AG

Inventor： Matthias Kuenle ,  Gerhard Schmidt ,  Martin Sporn ,  Markus Kahn ,  Juergen Steinbrenner ,  Ravi Joshi

IPC: C23C14/06 ,  H01L21/02 ,  H01L21/762 ,  H01L29/16 ,  H01L29/06 ,  H01L29/40 ,  C23C14/58 ,  C23C14/34 ,  C23C14/35 ,  H01L29/73

Abstract: According to various embodiments, a semiconductor wafer may include: a semiconductor body including an integrated circuit structure; and at least one tetrahedral amorphous carbon layer formed at least one of over or in the integrated circuit structure, the at least one tetrahedral amorphous carbon layer may include a substance amount fraction of sp3-hybridized carbon of larger than approximately 0.4 and a substance amount fraction of hydrogen smaller than approximately 0.1.

公开(公告)号：US10043750B2

公开(公告)日：2018-08-07

申请号：US14738967

申请日：2015-06-15

Applicant: Infineon Technologies AG

Inventor： Ravi Joshi ,  Juergen Steinbrenner

IPC: H01L23/528 ,  H01L21/02 ,  H01L21/768 ,  H01L23/532 ,  H01L21/285 ,  H01L21/311

Abstract: In various embodiments a method for manufacturing a metallization layer on a substrate is provided, wherein the method may include forming a plurality of groups of nanotubes over a substrate, wherein the groups of nanotubes may be arranged such that a portion of the substrate is exposed and forming metal over the exposed portion of the substrate between the plurality of groups of nanotubes.

公开(公告)号：US20150348824A1

公开(公告)日：2015-12-03

申请号：US14291107

申请日：2014-05-30

Applicant: Infineon Technologies AG

Inventor： Matthias Kuenle ,  Gerhard Schmidt ,  Martin Sporn ,  Markus Kahn ,  Juergen Steinbrenner ,  Ravi Joshi

IPC: H01L21/762 ,  H01L29/40 ,  C23C14/06 ,  C23C14/35 ,  C23C14/58 ,  H01L29/06 ,  C23C14/34

CPC classification number: H01L21/762 ,  C23C14/0605 ,  C23C14/345 ,  C23C14/35 ,  C23C14/5806 ,  H01L21/02527 ,  H01L21/02631 ,  H01L29/0649 ,  H01L29/0657 ,  H01L29/16 ,  H01L29/408 ,  H01L29/73

Abstract: According to various embodiments, a semiconductor wafer may include: a semiconductor body including an integrated circuit structure; and at least one tetrahedral amorphous carbon layer formed at least one of over or in the integrated circuit structure, the at least one tetrahedral amorphous carbon layer may include a substance amount fraction of sp3-hybridized carbon of larger than approximately 0.4 and a substance amount fraction of hydrogen smaller than approximately 0.1.

Abstract translation: 根据各种实施例，半导体晶片可以包括：包括集成电路结构的半导体本体; 以及至少一个四面体无定形碳层，形成在所述集成电路结构中的至少一个或所述集成电路结构中的至少一个，所述至少一个四面体非晶碳层可以包括大于约0.4的sp3-杂化碳的物质量分数和大于约0.4的物质量分数 的氢小于约0.1。

公开(公告)号：US09159669B2

公开(公告)日：2015-10-13

申请号：US14168025

申请日：2014-01-30

Applicant: Infineon Technologies AG

Inventor： Ravi Joshi ,  Juergen Steinbrenner

IPC: H01L23/528 ,  H01L21/768 ,  H01L21/02 ,  H01L23/532

CPC classification number: H01L23/528 ,  H01L21/02115 ,  H01L21/02527 ,  H01L21/02606 ,  H01L21/02645 ,  H01L21/28568 ,  H01L21/31138 ,  H01L21/76801 ,  H01L21/7682 ,  H01L21/76829 ,  H01L21/76871 ,  H01L21/76877 ,  H01L21/76885 ,  H01L23/53209 ,  H01L23/53223 ,  H01L23/53228 ,  H01L23/53266 ,  H01L23/5329 ,  H01L2221/1047 ,  H01L2924/0002 ,  H01L2924/00

Abstract: In various embodiments a method for manufacturing a metallization layer on a substrate is provided, wherein the method may include forming a plurality of groups of nanotubes over a substrate, wherein the groups of nanotubes may be arranged such that a portion of the substrate is exposed and forming metal over the exposed portion of the substrate between the plurality of groups of nanotubes.

Abstract translation: 在各种实施例中，提供了一种用于在衬底上制造金属化层的方法，其中所述方法可以包括在衬底上形成多组纳米管，其中所述纳米管组可以被布置成使得衬底的一部分被暴露， 在多组纳米管之间的衬底的暴露部分上形成金属。

公开(公告)号：US20150214144A1

公开(公告)日：2015-07-30

申请号：US14168025

申请日：2014-01-30

Applicant: Infineon Technologies AG

Inventor： Ravi Joshi ,  Juergen Steinbrenner

IPC: H01L23/528 ,  H01L21/02 ,  H01L23/532 ,  H01L21/768

CPC classification number: H01L23/528 ,  H01L21/02115 ,  H01L21/02527 ,  H01L21/02606 ,  H01L21/02645 ,  H01L21/28568 ,  H01L21/31138 ,  H01L21/76801 ,  H01L21/7682 ,  H01L21/76829 ,  H01L21/76871 ,  H01L21/76877 ,  H01L21/76885 ,  H01L23/53209 ,  H01L23/53223 ,  H01L23/53228 ,  H01L23/53266 ,  H01L23/5329 ,  H01L2221/1047 ,  H01L2924/0002 ,  H01L2924/00

Abstract: In various embodiments a method for manufacturing a metallization layer on a substrate is provided, wherein the method may include forming a plurality of groups of nanotubes over a substrate, wherein the groups of nanotubes may be arranged such that a portion of the substrate is exposed and forming metal over the exposed portion of the substrate between the plurality of groups of nanotubes.