公开(公告)号：US09472302B2

公开(公告)日：2016-10-18

申请号：US13788009

申请日：2013-03-07

Applicant: Intel Corporation

Inventor： Jason G. Sandri ,  Steve J. Brown ,  Peter R. Munguia ,  Monib Ahmed ,  Adrian R. Pearson

IPC: G11C17/18 ,  G11C17/16 ,  G11C8/20

CPC classification number: G11C17/18 ,  G11C8/20

Abstract: In accordance with some embodiments, fuse information may be written into a fuse array in a way that provides sufficient redundancy, making it harder for malicious parties to attack the fuse array.

Abstract translation: 根据一些实施例，熔丝信息可以以提供足够冗余的方式写入熔丝阵列，使得恶意方更难以攻击熔丝阵列。

公开(公告)号：US09372993B2

公开(公告)日：2016-06-21

申请号：US14639854

申请日：2015-03-05

Applicant: Intel Corporation

Inventor： Adrian R. Pearson ,  Christopher Andrew Thornburg ,  Steven J. Brown ,  Peter R. Munguia

IPC: G06F21/57

CPC classification number: G06F3/0625 ,  G06F1/3234 ,  G06F3/0622 ,  G06F21/57 ,  G06F21/575 ,  G06F21/79 ,  H04L9/3247

Abstract: A disclosed example method involves configuring a processor to, when transitioning the processor system to a low-power mode, use a key and a random or pseudo-random value to generate a first signature based on a sample of memory regions to be protected during the low-power mode, the memory regions based on a manufacturer required regions table and a third-party required regions table. The disclosed example method also involves configuring a processor to, during a resume process of the processor system from the low-power mode, generate a second signature based on the sample of the memory regions protected during the low-power mode. The disclosed example method also involves configuring a processor to, when the first signature matches the second signature, cause the processor system to resume from the low-power mode, and when the first signature does not match the second signature, generate an error.

Abstract translation: 所公开的示例性方法包括配置处理器以在将处理器系统转换到低功率模式时，使用密钥和随机或伪随机值，以基于在所述第一签名期间保护的存储器区域的样本来生成第一签名 低功耗模式，内存区域基于制造商所需的区域表和第三方所需区域表。 所公开的示例性方法还涉及将处理器配置成在处理器系统从低功率模式的恢复过程期间，基于在低功率模式期间受保护的存储器区域的采样来生成第二签名。 所公开的示例方法还涉及将处理器配置为当第一签名与第二签名匹配时使得处理器系统从低功率模式恢复，并且当第一签名与第二签名不匹配时，生成错误。

公开(公告)号：US20210264042A1

公开(公告)日：2021-08-26

申请号：US17237102

申请日：2021-04-22

Applicant: INTEL CORPORATION

Inventor： BRIAN S. HAUSAUER ,  Lokpraveen B. Mosur ,  Tony Hurson ,  Patrick Fleming ,  Adrian R. Pearson

IPC: G06F21/62 ,  H04L29/06 ,  G06F21/78 ,  H04L9/32 ,  H04L9/08

Abstract: Various embodiments are generally directed to an apparatus, method and other techniques to determine a secure memory region for a transaction, the secure memory region associated with a security association context to perform one or more of an encryption/decryption operation and an authentication operation for the transaction, perform one or more of the encryption/decryption operation and the authentication operation for the transaction based on the security association context, and cause communication of the transaction.

公开(公告)号：US20170235958A1

公开(公告)日：2017-08-17

申请号：US15443831

申请日：2017-02-27

Applicant: Intel Corporation

Inventor： Hormuzd M. Khosravi ,  Adrian R. Pearson ,  Ned M. Smith ,  Abhilasha Bhargav-Spantzel

IPC: G06F21/57 ,  G06F9/44

CPC classification number: G06F21/575 ,  G06F9/4406 ,  G06F9/441 ,  G06F9/4418 ,  G06F21/31 ,  H04L63/102 ,  H04L63/108

Abstract: Methods, apparatus, systems and articles of manufacture are disclosed to initialize a platform. An example disclosed apparatus includes a boot loader manager to prevent operating system loading in response to detecting a power-on condition, a context manager to retrieve first context information associated with the platform, and a policy manager to identify a first operating system based on the first context information, the policy manager to authorize the boot loader manager to load the first operating system.

公开(公告)号：US20160299721A1

公开(公告)日：2016-10-13

申请号：US15187348

申请日：2016-06-20

Applicant: Intel Corporation

Inventor： Adrian R. Pearson ,  Christopher Andrew Thornburg ,  Steven J. Brown ,  Peter R. Munguia

IPC: G06F3/06 ,  G06F1/32 ,  H04L9/32

CPC classification number: G06F3/0625 ,  G06F1/3234 ,  G06F3/0622 ,  G06F21/57 ,  G06F21/575 ,  G06F21/79 ,  H04L9/3247

Abstract: A disclosed example involves managing power states, signing a suspend-to-RAM (STR) data structure by: generating a header key, a scatter/gather table key and a dynamic random access memory (DRAM) key using a root key generated by the secure processor. Generating a header signature using the header key, the header signature based on a table header and a random or pseudo-random value. Generating a scatter/gather table signature using the scatter/gather table key, the scatter/gather table signature based on a scatter/gather table header and a random or pseudo-random value. Generating a DRAM signature using the DRAM key and a value from a region of DRAM. Storing the header signature, the scatter/gather table signature and the DRAM signature in the STR data structure. Resume the processor system from the low-power mode when the data structure is valid based on a comparison of a first signature and a second signature.

Abstract translation: 所公开的示例涉及通过以下方式来管理电源状态，签名挂起到RAM（STR）数据结构：使用由该密钥生成的根密钥生成头部密钥，分散/聚集表密钥和动态随机存取存储器（DRAM）密钥 安全处理器。 使用头部密钥生成头部签名，基于表头部的头部签名和随机或伪随机值。 使用分散/收集表密钥生成分散/收集表签名，基于分散/收集表头的分散/收集表签名和随机或伪随机值。 使用DRAM密钥和来自DRAM区域的值生成DRAM签名。 在STR数据结构中存储头标签，分散/收集表签名和DRAM签名。 当数据结构基于第一签名和第二签名的比较而有效时，从低功率模式恢复处理器系统。

公开(公告)号：US20160179554A1

公开(公告)日：2016-06-23

申请号：US14581309

申请日：2014-12-23

Applicant: Intel Corporation

Inventor： Hormuzd M. Khosravi ,  Adrian R. Pearson ,  Ned M. Smith ,  Abhilasha Bhargav-Spantzel

IPC: G06F9/44 ,  G06F21/31 ,  G06F21/57

CPC classification number: G06F21/575 ,  G06F9/4406 ,  G06F9/441 ,  G06F9/4418 ,  G06F21/31 ,  H04L63/102 ,  H04L63/108

Abstract: Methods, apparatus, systems and articles of manufacture are disclosed to initialize a platform. An example disclosed apparatus includes a boot loader manager to prevent operating system loading in response to detecting a power-on condition, a context manager to retrieve first context information associated with the platform, and a policy manager to identify a first operating system based on the first context information, the policy manager to authorize the boot loader manager to load the first operating system.

Abstract translation: 公开了方法，装置，系统和制品以初始化平台。 一个示例公开的装置包括：启动加载程序管理器，用于响应于检测到上电状况而防止操作系统加载;上下文管理器，用于检索与该平台相关联的第一上下文信息;以及策略管理器，用于基于该第一操作系统识别第一操作系统 第一个上下文信息，策略管理器授权引导加载程序管理器加载第一个操作系统。

公开(公告)号：US09113151B2

公开(公告)日：2015-08-18

申请号：US14102576

申请日：2013-12-11

Applicant: Intel Corporation

Inventor： Musa Jahanghir ,  Adrian R. Pearson ,  Prasenjit Biswas

IPC: H04N7/12 ,  H04N19/91 ,  H04N19/70 ,  H04N19/44 ,  H04N19/42

CPC classification number: H04N19/91 ,  H04N19/42 ,  H04N19/44 ,  H04N19/70

Abstract: Apparatus, systems and methods for hardware accelerated compressed video bitstream escape code handling are disclosed including an apparatus comprising a bitstream parser (BSP) to parse a bitstream of compressed video data. The BSP includes circuitry to extract uncompressed run and level data from the bitstream when the BSP detects an escape code in the bitstream. Other implementations are disclosed.

Abstract translation: 公开了用于硬件加速的压缩视频比特流转义码处理的装置，系统和方法，包括包括用于解析压缩视频数据的比特流的比特流解析器（BSP）的装置。 BSP包括当BSP在比特流中检测到转义码时从比特流提取未压缩运行和电平数据的电路。 公开了其他实现。