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11.
公开(公告)号:US20230317584A1
公开(公告)日:2023-10-05
申请号:US17707371
申请日:2022-03-29
Applicant: Intel Corporation
Inventor: Yi YANG , Suddhasattwa NAD , Marcel WALL , Rahul N. MANEPALLI , Benjamin DUONG
IPC: H01L23/498 , H01L21/48 , H05K1/18
CPC classification number: H01L23/49822 , H01L23/49866 , H01L23/49894 , H01L21/4857 , H01L21/486 , H05K1/181 , H01L24/16
Abstract: Embodiments disclosed herein include electronic packages. In an embodiment, the electronic package comprises a package substrate with a plurality of first layers, where the first layers comprise an organic material. In an embodiment, a trace is embedded in the package substrate. In an embodiment, a second layer is over the trace, where the second layer comprises silicon and nitrogen, and wherein the second layer is chemically bonded to one of the first layers by an oxygen containing ligand and/or a nitrogen containing ligand.
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12.
公开(公告)号:US20230317583A1
公开(公告)日:2023-10-05
申请号:US17707358
申请日:2022-03-29
Applicant: Intel Corporation
Inventor: Rahul N. MANEPALLI , Yi YANG , Suddhasattwa NAD , Benjamin DUONG , Marcel WALL
IPC: H01L23/498 , H01L21/48 , H05K1/18
CPC classification number: H01L23/49822 , H01L23/49866 , H01L23/49894 , H01L21/4857 , H05K1/181 , H01L24/16
Abstract: Embodiments disclosed herein include electronic packages. In an embodiment, an electronic package comprises a package substrate with a plurality of first layers, where the first layers comprise an organic material. In an embodiment, a trace is embedded in the package substrate. In an embodiment, a second layer is over the trace, where the second layer comprises silicon, nitrogen, and a catalyst, and where the second layer is chemically bonded to one of the first layers.
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公开(公告)号:US20230093438A1
公开(公告)日:2023-03-23
申请号:US17481266
申请日:2021-09-21
Applicant: Intel Corporation
Inventor: Benjamin DUONG , Kristof DARMAWIKARTA , Srinivas V. PIETAMBARAM , Darko GRUJICIC , Bai NIE , Tarek A. IBRAHIM , Ankur AGRAWAL , Sandeep GAAN , Ravindranath V. MAHAJAN , Aleksandar ALEKSOV
Abstract: Embodiments disclosed herein include electronic packages and methods of forming such electronic packages. In an embodiment, an electronic package comprises a first layer, where the first layer comprises glass. In an embodiment, a second layer is over the first layer, where the second layer comprises a mold material. In an embodiment, a first photonics integrated circuit (PIC) is within the second layer. In an embodiment, a second PIC is within the second layer, and a waveguide is in the first layer. In an embodiment, the waveguide optically couples the first PIC to the second PIC.
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公开(公告)号:US20230083222A1
公开(公告)日:2023-03-16
申请号:US17476357
申请日:2021-09-15
Applicant: Intel Corporation
Inventor: Kristof DARMAWIKARTA , Benjamin DUONG , Srinivas V. PIETAMBARAM , Tarek A. IBRAHIM , Hari MAHALINGAM , Bai NIE
Abstract: Embodiments disclosed herein include electronic packages with photonics integrated circuits (PICs). In an embodiment, an electronic package comprises a glass substrate with a first recess and a second recess. In an embodiment, a PIC is in the first recess. In an embodiment, an optics module is in the second recess, and an optical waveguide is embedded in the glass substrate between the first recess and the second recess. In an embodiment, the optical waveguide optically couples the PIC to the optics module.
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