公开(公告)号：US11949441B2

公开(公告)日：2024-04-02

申请号：US16936456

申请日：2020-07-23

Applicant: Intel Corporation

Inventor： Elan Banin ,  Ofir Degani ,  Rotem Banin ,  Shahar Gross

IPC: H04B1/04 ,  H04B7/10

CPC classification number: H04B1/0475 ,  H04B7/10 ,  H04B2001/0491

Abstract: A transmitter for generating a radio frequency, RF, transmit signal is provided. The transmitter includes signal generation circuitry configured to generate, based on a sequence of first control words each indicating a respective frequency shift with respect to a target frequency of the RF transmit signal, a RF carrier signal with sequentially varying frequency over time in order to frequency spread the RF transmit signal. Further, the transmitter includes modulation circuitry configured to generate the RF transmit signal by modulating the RF carrier signal with a modulation control signal. The transmitter additionally includes modification circuitry configured to generate the modulation control signal by modifying, based on the sequence of first control words, phase information of a baseband signal bearing information to be transmitted or phase information of a signal derived from the baseband signal in order to frequency de-spread the RF transmit signal.

公开(公告)号：US11870449B2

公开(公告)日：2024-01-09

申请号：US17638739

申请日：2019-12-28

Applicant: Intel Corporation

Inventor： Elan Banin ,  Yaniv Cohen ,  Ofir Degani ,  Igal Kushnir

IPC: H03L7/099 ,  G06F1/08 ,  H03L7/093

CPC classification number: H03L7/0992 ,  G06F1/08 ,  H03L7/093

Abstract: A clock generator calibration system can include a phased-locked loop and a correction circuit. The PLL can generate an output clock signal, and the correction circuit can adjust a frequency signal of the PLL based on a digital signal of the PLL. The digital signal can be generated based on the adjusted frequency signal.

公开(公告)号：US20210367629A1

公开(公告)日：2021-11-25

申请号：US17393564

申请日：2021-08-04

Applicant: Intel Corporation

Inventor： Ashoke Ravi ,  Benjamin Jann ,  Satwik Patnaik ,  Alexandros Margomenos ,  Igal Kushnir ,  Elan Banin ,  Ofir Degani

IPC: H04B1/04 ,  H03L7/24 ,  G01R27/06 ,  H01Q3/40

Abstract: Techniques are described related to digital radio control and operation. The various techniques described herein enable high-frequency local oscillator (LO) signal generation using injection locked cock multipliers (ILCMs). The techniques also include the use of LO signals for carrier aggregation applications for phased array front ends. Furthermore, the disclosed techniques include the use of array element-level control using per-chain DC-DC converters. Still further, the disclosed techniques include the use of adaptive spatial filtering and optimal combining of analog-to-digital converters (ADCs) to maximize dynamic range in digital beamforming systems.

公开(公告)号：US20210067182A1

公开(公告)日：2021-03-04

申请号：US16550574

申请日：2019-08-26

Applicant: Intel Corporation

Inventor： Ashoke Ravi ,  Jann Benjamin ,  Satwik Patnaik ,  Elan Banin ,  Igal Kushnir ,  Ofir Degani ,  Alexandros Margomenos

IPC: H04B1/04 ,  H01Q3/40 ,  G01R27/06 ,  H03L7/24

Abstract: Techniques are described related to digital radio control and operation. The various techniques described herein enable high-frequency local oscillator (LO) signal generation using injection locked cock multipliers (ILCMs). The techniques also include the use of LO signals for carrier aggregation applications for phased array front ends. Furthermore, the disclosed techniques include the use of array element-level control using per-chain DC-DC converters. Still further, the disclosed techniques include the use of adaptive spatial filtering and optimal combining of analog-to-digital converters (ADCs) to maximize dynamic range in digital beamforming systems.

公开(公告)号：US20250105864A1

公开(公告)日：2025-03-27

申请号：US18971513

申请日：2024-12-06

Applicant: Intel Corporation

Inventor： Ashoke Ravi ,  Benjamin Jann ,  Satwik Patnaik ,  Elan Banin ,  Ofir Degani ,  Alexandros Margomenos ,  Igal Kushnir

IPC: H04B1/04 ,  G01R27/06 ,  H01Q3/40 ,  H03L7/081 ,  H03L7/24

Abstract: Techniques are described related to digital radio control and operation. The various techniques described herein enable high-frequency local oscillator (LO) signal generation using injection locked cock multipliers (ILCMs). The techniques also include the use of LO signals for carrier aggregation applications for phased array front ends. Furthermore, the disclosed techniques include the use of array element-level control using per-chain DC-DC converters. Still further, the disclosed techniques include the use of adaptive spatial filtering and optimal combining of analog-to-digital converters (ADCs) to maximize dynamic range in digital beamforming systems.

公开(公告)号：US12101683B2

公开(公告)日：2024-09-24

申请号：US17129702

申请日：2020-12-21

Applicant: Intel Corporation

Inventor： Omer Sholev ,  Ofir Degani ,  Elan Banin ,  Uri Parker ,  Assaf Gurevitz

IPC: H04W4/02 ,  H04W84/12

CPC classification number: H04W4/023 ,  H04W84/12

Abstract: Among other things, embodiments of the present disclosure help to overcome environment-specific dependency issues of conventional Wi-Fi-based sensing systems, thus allowing a neural network to make better proximity predictions in an unseen environment. Other embodiments may be described and claimed.

公开(公告)号：US11991265B2

公开(公告)日：2024-05-21

申请号：US17481357

申请日：2021-09-22

Applicant: Intel Corporation

Inventor： Elan Banin ,  Evgeny Shumaker ,  Ofir Degani ,  Rotem Banin ,  Shahar Gross

IPC: H04L27/22 ,  H03C3/06 ,  H04B1/04 ,  H04L7/033 ,  H04L27/152

CPC classification number: H04L7/0331 ,  H03C3/06 ,  H04L7/0332 ,  H04L27/152 ,  H04L27/22

Abstract: A wireless communication device for asymmetrical frequency spreading including a processor configured to receive a frequency band message comprising a maximum difference and a minimum difference, wherein the maximum difference is between a maximum frequency of a sub-band and a signal frequency, and wherein the minimum difference is between the minimum frequency of the sub-band and the signal frequency compare the maximum difference and the minimum difference with each other; and generate a frequency shift based on the comparison.

公开(公告)号：US11592339B2

公开(公告)日：2023-02-28

申请号：US16727966

申请日：2019-12-27

Applicant: Intel Corporation

Inventor： Omer Sholev ,  Elan Banin ,  Ofir Degani ,  Assaf Ben-Bassat

IPC: G01K7/00 ,  H04B1/04 ,  H04B17/13

Abstract: A device may comprise: a storage for storing a reference output representing an output of an electrical circuit at a reference temperature; one or more processors, configured to: determine a temperature shift based on a comparison of an output of the electrical circuit sensed at a sensing temperature and the reference output; determine a plurality of coefficients of a model of the temperature shift, wherein the model implements one or more functions that associate the plurality of coefficients and a temperature with the temperature shift at the temperature.

公开(公告)号：US20220416941A1

公开(公告)日：2022-12-29

申请号：US17356243

申请日：2021-06-23

Applicant: Intel Corporation

Inventor： Elan Banin ,  Lior Menashe ,  Eytan Mann ,  Ofir Degani ,  Rotem Banin

IPC: H04L1/00

Abstract: For example, an apparatus may include an encoder configured to encode data into a plurality of codewords according to a parity function for a transmission modulated according to a Differential Modulation (DM) scheme, and/or a decoder to decode received codewords of the transmission.

公开(公告)号：US20220393690A1

公开(公告)日：2022-12-08

申请号：US17638739

申请日：2019-12-28

Applicant: Intel Corporation

Inventor： Elan Banin ,  Yaniv Cohen ,  Ofir Degani ,  Igal Kushnir

IPC: H03L7/099 ,  H03L7/093 ,  G06F1/08

Abstract: A clock generator calibration system can include a phased-locked loop and a correction circuit. The PLL can generate an output clock signal, and the correction circuit can adjust a frequency signal of the PLL based on a digital signal of the PLL. The digital signal can be generated based on the adjusted frequency signal.