公开(公告)号：US11688660B2

公开(公告)日：2023-06-27

申请号：US16534820

申请日：2019-08-07

Applicant: Intel Corporation

Inventor： Aleksandar Aleksov ,  Feras Eid ,  Georgios Dogiamis ,  Telesphor Kamgaing ,  Johanna M. Swan

IPC: H01Q23/00 ,  H01Q1/52 ,  H01Q1/02 ,  H01L23/36 ,  H01L23/538 ,  H01L23/552

CPC classification number: H01L23/36 ,  H01L23/5381 ,  H01L23/552

Abstract: Embodiments may relate to a radio frequency (RF) multi-chip module that includes a first RF die and a second RF die. The first and second RF dies may be coupled with a package substrate at an inactive side of the respective dies. A bridge may be coupled with an active side of the first and second RF dies die such that the first and second RF dies are communicatively coupled through the bridge, and such that the first and second RF dies are at least partially between the package substrate and the bridge. Other embodiments may be described or claimed.

公开(公告)号：US11605603B2

公开(公告)日：2023-03-14

申请号：US16397718

申请日：2019-04-29

Applicant: Intel Corporation

Inventor： Adel A. Elsherbini ,  Georgios Dogiamis ,  Telesphor Kamgaing ,  Henning Braunisch ,  Johanna M. Swan ,  Shawna M. Liff ,  Aleksandar Aleksov

IPC: H01L27/146 ,  H01L23/00 ,  H01L23/66

Abstract: Embodiments may relate to a microelectronic package that includes a radio frequency (RF) chip coupled with a die by interconnects with a first pitch. The RF chip may further be coupled with a waveguide of a package substrate by interconnects with a second pitch that is different than the first pitch. The RF chip may facilitate conveyance of data to the waveguide as an electromagnetic signal with a frequency greater than approximately 20 gigahertz (GHz). Other embodiments may be described or claimed.

公开(公告)号：US11581272B2

公开(公告)日：2023-02-14

申请号：US16394537

申请日：2019-04-25

Applicant: Intel Corporation

Inventor： Henning Braunisch ,  Adel A. Elsherbini ,  Georgios Dogiamis ,  Telesphor Kamgaing ,  Richard Dischler ,  Johanna M. Swan ,  Victor J. Prokoff

IPC: H01L23/66 ,  H01L23/538 ,  H01L25/065 ,  H01L23/00

Abstract: Embodiments may relate to a multi-chip microelectronic package that includes a first die and a second die coupled to a package substrate. The first and second dies may have respective radiative elements that are communicatively coupled with one another such that they may communicate via an electromagnetic signal with a frequency at or above approximately 20 gigahertz (GHz). Other embodiments may be described or claimed.

公开(公告)号：US11575749B2

公开(公告)日：2023-02-07

申请号：US16757751

申请日：2017-12-30

Applicant: Intel Corporation

Inventor： Georgios C. Dogiamis ,  Sasha N. Oster ,  Adel A. Elsherbini ,  Erich N. Ewy ,  Johanna M. Swan ,  Telesphor Kamgaing

IPC: H04B1/3822 ,  H04B1/08 ,  H04L67/12 ,  B60R16/023 ,  B60R16/03 ,  G08C23/06 ,  H01P3/08 ,  H04L5/14 ,  B60W60/00

Abstract: Embodiments include a sensor node, an active sensor node, and a vehicle with a communication system that includes sensor nodes. The sensor node include a package substrate, a diplexer/combiner block on the package substrate, a transceiver communicatively coupled to the diplexer/combiner block, and a first mm-wave launcher coupled to the diplexer/combiner block. The sensor node may have a sensor communicatively coupled to the transceiver, the sensor is communicatively coupled to the transceiver by an electrical cable and located on the package substrate. The sensor node may include that the sensor operates at a frequency band for communicating with an electronic control unit (ECU) communicatively coupled to the sensor node. The sensor node may have a filter communicatively coupled to the diplexer/combiner block, the transceiver communicatively coupled to the filter, the filter substantially removes frequencies from RF signals other than the frequency band of the sensor.

公开(公告)号：US11562971B2

公开(公告)日：2023-01-24

申请号：US16843803

申请日：2020-04-08

Applicant: Intel Corporation

Inventor： Telesphor Kamgaing ,  Adel A. Elsherbini ,  Sasha N. Oster

IPC: H01L23/66 ,  H01L21/48 ,  H01L23/498 ,  H01L23/00 ,  H01Q1/36 ,  H01Q9/04 ,  H01Q9/16 ,  H01Q9/30

Abstract: In various embodiments, disclosed herein are systems and methods directed to the fabrication of a coreless semiconductor package (e.g., a millimeter (mm)-wave antenna package) having an asymmetric build-up layer count that can be fabricated on both sides of a temporary substrate (e.g., a core). The asymmetric build-up layer count can reduce the overall layer count in the fabrication of the semiconductor package and can therefore contribute to fabrication cost reduction. In further embodiments, the semiconductor package (e.g., a millimeter (mm)-wave antenna packages) can further comprise dummification elements disposed near one or more antenna layers. Further, the dummification elements disposed near one or more antenna layers can reduce image current and thereby increasing the antenna gain and efficiency.

公开(公告)号：US11538803B2

公开(公告)日：2022-12-27

申请号：US16221086

申请日：2018-12-14

Applicant: Intel Corporation

Inventor： Gilbert Dewey ,  Telesphor Kamgaing ,  Aleksandar Aleksov ,  Gerogios Dogiamis ,  Hyung-Jin Lee

IPC: H01L29/40 ,  H01L21/00 ,  H01L27/07 ,  H01L21/8238 ,  H01L23/538 ,  H01L23/00 ,  H01L25/07 ,  H01L29/16 ,  H01L29/20 ,  H01L29/78

Abstract: Embodiments disclosed herein include semiconductor devices and methods of forming such devices. In an embodiment the semiconductor device comprises a first semiconductor layer, where first transistors are fabricated in the first semiconductor layer, and a back end stack over the first transistors. In an embodiment the back end stack comprises conductive traces and vias electrically coupled to the first transistors. In an embodiment, the semiconductor device further comprises a second semiconductor layer over the back end stack, where the second semiconductor layer is a different semiconductor than the first semiconductor layer. In an embodiment, second transistors are fabricated in the second semiconductor layer.

公开(公告)号：US11476554B2

公开(公告)日：2022-10-18

申请号：US16613386

申请日：2017-07-01

Applicant: Intel Corporation

Inventor： Georgios Dogiamis ,  Sasha Oster ,  Telesphor Kamgaing ,  Erich Ewy ,  Adel Elsherbini ,  Johanna Swan

IPC: H01P3/16 ,  H01P5/02 ,  B60R16/023 ,  H01L23/66 ,  H01L25/18 ,  H01R13/622 ,  H01R13/631 ,  H01R13/646 ,  H05K1/18 ,  H05K5/00 ,  H05K5/02 ,  H05K7/20

Abstract: Embodiments of the invention include dielectric waveguides and connectors for dielectric waveguides. In an embodiment a dielectric waveguide connector may include an outer ring and one or more posts extending from the outer ring towards the center of the outer ring. In some embodiments, a first dielectric waveguide secured within the dielectric ring by the one or more posts. In another embodiment, an enclosure surrounding electronic components may include an enclosure wall having an interior surface and an exterior surface and a dielectric waveguide embedded within the enclosure wall. In an embodiment, a first end of the dielectric waveguide is substantially coplanar with the interior surface of the enclosure wall and a second end of the dielectric waveguide is substantially coplanar with the exterior surface of the enclosure wall.

公开(公告)号：US11437706B2

公开(公告)日：2022-09-06

申请号：US16369452

申请日：2019-03-29

Applicant: Intel Corporation

Inventor： Georgios Dogiamis ,  Aleksandar Aleksov ,  Telesphor Kamgaing ,  Gilbert W. Dewey ,  Hyung-Jin Lee

IPC: H01L25/065 ,  H01Q1/22 ,  H01L23/00 ,  H01L23/66 ,  H01L23/552 ,  H01L25/00

Abstract: Embodiments may relate to an semiconductor package. The semiconductor package may include a die coupled with the face of the package substrate. The semiconductor package may further include a waveguide coupled with the face of the package substrate adjacent to the die, wherein the waveguide is to receive an electromagnetic signal from the die and facilitate conveyance of the electromagnetic signal in a direction parallel to the face of the package substrate. Other embodiments may be described or claimed.

公开(公告)号：US11328986B2

公开(公告)日：2022-05-10

申请号：US16554288

申请日：2019-08-28

Applicant: INTEL CORPORATION

Inventor： Aleksandar Aleksov ,  Feras Eid ,  Georgios Dogiamis ,  Telesphor Kamgaing ,  Johanna M. Swan

IPC: H01L23/522 ,  H01L49/02 ,  H01L23/00 ,  H01L23/495

Abstract: Disclosed herein are capacitor-wirebond pad structures for integrated circuit (IC) packages, as well as related methods and devices. For example, in some embodiments, an IC package may include a die and an IC package support. The IC package support may include a capacitor, and the capacitor may include a first capacitor plate, a second capacitor plate, and a capacitor dielectric between the first capacitor plate and the second capacitor plate. The die may be wirebonded to the first capacitor plate.

公开(公告)号：US11316497B2

公开(公告)日：2022-04-26

申请号：US16707497

申请日：2019-12-09

Applicant: Intel Corporation

Inventor： Georgios Dogiamis ,  Aleksandar Aleksov ,  Feras Eid ,  Telesphor Kamgaing ,  Johanna M. Swan

IPC: H03H9/54 ,  H03H9/02 ,  H03H9/64

Abstract: Embodiments may relate to a die such as an acoustic wave resonator (AWR) die. The die may include a first filter and a second filter in the die body. The die may further include an electromagnetic interference (EMI) structure that surrounds at least one of the filters. Other embodiments may be described or claimed.