摘要:
A structure (and method) for a piezoelectric device, including a layer of piezoelectric material. A nanotube structure is mounted such that a change of shape of the piezoelectric material causes a change in a stress in the nanotube structure.
摘要:
A self-aligned carbon-nanotube field effect transistor semiconductor device comprises a carbon-nanotube deposited on a substrate, a source and a drain formed at a first end and a second end of the carbon-nanotube, respectively, and a gate formed substantially over a portion of the carbon-nanotube, separated from the carbon-nanotube by a dielectric film.
摘要:
A method is provided for forming a device. The method provides a substrate, and provides a plurality of nanotubes in contact with the substrate. The method comprises depositing metal contacts on the substrate, wherein the metal contacts are in contact with a portion of at least one nanotube. The method further comprises selectively breaking the at least one nanotube using an electrical current, removing the metal contacts, cleaning a remaining nanotube, and depositing a first metal contact in contact with a first end of the nanotube and a second metal contact in contact with a second end of the nanotube.
摘要:
A method is provided for forming a device. The method provides an insulating substrate including a source electrode, a drain electrode, and a gate electrode. The method provides carbon nanotube bundles including metallic and semiconducting component nanotubes in contact with the substrate. The method applies a voltage to the gate electrode to deplete the semiconducting component nanotubes of carriers, applies an electrical current through the nanotube, from a source electrode to a drain electrode, and breaks at least one metallic component nanotube to form a field effect transistor. The carbon nanotube bundle can be a multi-walled nanotube or a single-walled nanotube rope.
摘要:
A complementary metal oxide semiconductor (CMOS) device, e.g., a field effect transistor (FET), that includes at least one one-dimensional nanostructure that is typically a carbon-based nanomaterial, as the device channel, and a metal carbide contact that is self-aligned with the gate region of the device is described. The present invention also provides a method of fabricating such a CMOS device.
摘要:
A complementary metal oxide semiconductor (CMOS) device, e.g., a field effect transistor (FET), that includes at least one one-dimensional nanostructure that is typically a carbon-based nanomaterial, as the device channel, and a metal carbide contact that is self-aligned with the gate region of the device is described. The present invention also provides a method of fabricating such a CMOS device.
摘要:
A complementary metal oxide semiconductor (CMOS) device, e.g., a field effect transistor (FET), that includes at least one one-dimensional nanostructure that is typically a carbon-based nanomaterial, as the device channel, and a metal carbide contact that is self-aligned with the gate region of the device is described. The present invention also provides a method of fabricating such a CMOS device.
摘要:
A complementary metal oxide semiconductor (CMOS) device, e.g., a field effect transistor (FET), that includes at least one one-dimensional nanostructure that is typically a carbon-based nanomaterial, as the device channel, and a metal carbide contact that is self-aligned with the gate region of the device is described. The present invention also provides a method of fabricating such a CMOS device.
摘要:
A complementary metal oxide semiconductor (CMOS) device, e.g., a field effect transistor (FET), that includes at least one one-dimensional nanostructure that is typically a carbon-based nanomaterial, as the device channel, and a metal carbide contact that is self-aligned with the gate region of the device is described. The present invention also provides a method of fabricating such a CMOS device.
摘要:
A method of fabricating a nanotube field-effect transistor having unipolar characteristics and a small inverse sub-threshold slope includes forming a local gate electrode beneath the nanotube between drain and source electrodes of the transistor and doping portions of the nanotube. In a further embodiment, the method includes forming at least one trench in the gate dielectric (e.g., a back gate dielectric) and back gate adjacent to the local gate electrode. Another aspect of the invention is a nanotube field-effect transistor fabricated using such a method.