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公开(公告)号：US20100309970A1
公开(公告)日：2010-12-09
申请号：US12787290
申请日：2010-05-25
Applicant: Jacques Meyer
Inventor： Jacques Meyer
CPC classification number: H04L27/0014 , H04L25/03057 , H04L2025/03401 , H04L2025/0342 , H04L2025/0349 , H04L2027/003 , H04L2027/004 , H04L2027/0057
Abstract: A method for demodulating a modulated signal, by: receiving a signal modulated in n-PSK or n-APSK comprising a succession of symbols organized in frames, each frame comprising a header followed by blocks of data symbols separated by blocks of pilot symbols, determining the phase of the headers and pilot blocks to predict the evolution of the signal phase, correcting the phase of the data symbols according to the evolution of the signal phase, and equalizing the data symbols corrected in phase using equalization coefficients evaluated thanks to estimated or known symbols of the signal, and pre-equalizing the header, pilot and data symbols, which is performed before determining the phase of the headers and pilot blocks, and using the estimated equalization coefficients to equalize the data symbols.
Abstract translation: 一种用于通过以下方式解调调制信号的方法：接收在n-PSK或n-APSK中调制的信号，所述信号包括以帧组织的一连串符号，每个帧包括一个头部，随后是由导频符号块分隔的数据符号块，确定 标头和导频块的相位来预测信号相位的演变，根据信号相位的演变校正数据符号的相位，以及使用经估计或已知的均衡系数评估的相位校正的数据符号的均衡 信号的符号，并且在确定报头和导频块的相位之前执行的报头，导频和数据符号的预均衡，并且使用估计的均衡系数来均衡数据符号。
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12.发明授权Process for automatic correction of the spectral inversion in a demodulator and device to implement the process 有权在解调器和设备中自动校正频谱反演的过程，以实现该过程公开(公告)号：US07697636B2
公开(公告)日：2010-04-13
申请号：US11428148
申请日：2006-06-30
Applicant: Jacques Meyer
Inventor： Jacques Meyer
IPC: H04L27/14
CPC classification number: H04L27/2273 , H03D3/00 , H04L27/22
Abstract: A process of correction of the spectral inversion for a receiver in a digital communication system: the process allows the reception in the receiver of a training sequence presumably known according to a modulation of type π/2 BPSK or MDP2. The process includes the following steps: Demodulating of the training sequence; Calculating of the differential correlation on a set of N received samples (Rn) and presumably sent (Sn) to generate a result; Using the result to detect the beginning of the frame and to order a spectral inversion in the chain of reception of the aforementioned receiver before launching the detection of the beginning of the frame. A receiver to process automatically the spectral inversion is also described.
Abstract translation: 校正数字通信系统中的接收机的频谱反演的过程：该过程允许在接收机中接收根据类型＆pgr / 2 BPSK或MDP2的调制推测的训练序列。 该过程包括以下步骤：解调训练序列; 计算一组N个接收样本（Rn）和推测发送（Sn）以产生结果的差分相关; 使用该结果来检测帧的开头并且在开始检测到帧的开始之前在上述接收器的接收链中订购频谱反转。 还描述了自动处理频谱反演的接收机。
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13.发明授权Device for estimating a timing correction loop error for a digital demodulator 有权用于估计数字解调器的定时校正回路误差的装置公开(公告)号：US07660377B2
公开(公告)日：2010-02-09
申请号：US11270388
申请日：2005-11-09
Applicant: Jacques Meyer
Inventor： Jacques Meyer
IPC: H04L7/00
CPC classification number: H04L7/007 , H04L7/0029 , H04L2027/003 , H04L2027/0057
Abstract: A device for providing a digital error signal, for a timing correction loop of a digital demodulator for digital transmission by phase modulation or amplitude and phase modulation, the device successively receiving pairs of digital signals representative of the components of complex signals, and having circuitry for providing a difference signal representative of the difference between the modulus of the complex signal corresponding to the last received pair of digital signals and the modulus of the complex signal corresponding to the previously-received pair of digital signals; circuitry for providing a weighting factor which depends on the angle between the complex signal corresponding to the last received pair of digital signals and the complex signal corresponding to the previously-received pair of digital signals; and circuitry for providing the error signal proportional to the product of the difference signal and of the weighting factor.
Abstract translation: 一种用于为通过相位调制或幅度和相位调制进行数字传输的数字解调器的定时校正回路提供数字误差信号的装置，该装置连续地接收代表复信号分量的数字信号对，并具有用于 提供表示对应于最后接收的数字信号对的复数信号的模数与对应于先前接收到的数字信号对的复数信号的模数之间的差的差信号; 用于提供取决于对应于最后接收的数字信号对的复信号与对应于先前接收到的一对数字信号的复信号之间的角度的加权因子的电路; 以及用于提供与差分信号和加权因子的乘积成比例的误差信号的电路。
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公开(公告)号：USRE36749E
公开(公告)日：2000-06-27
申请号：US280730
申请日：1994-07-26
Applicant: Jacques Meyer
Inventor： Jacques Meyer
IPC: H04N7/08 , H03K5/08 , H04L7/04 , H04N7/035 , H04N7/081 , H04N7/083 , H04N7/087 , H04N7/088 , H04N7/04 , H04N5/08
CPC classification number: H04L7/046 , H03K5/088 , H04N7/0355
Abstract: An extractor for digital data transmitted at a first determined frequency (f0) through a video channel after a burst of 0s and 1s emitted at a first frequency (f0). A comparator (1) compares the input signal with a threshold level. A threshold level is provided by an up/down counter (12) operating at a frequency (F0) multiple of the first frequency, the up/down counting input of which is connected to the output of the comparator (1), and a digital/analog converter (16) receiving the output of the up/down counter and supplying the threshold level (V.sub.T).
Abstract translation: 在以第一频率（f0）发射的0和1的脉冲串之后通过视频通道以第一确定频率（f0）发送的数字数据的提取器。 比较器（1）将输入信号与阈值电平进行比较。 阈值电平由上/下计数器（12）提供，该上/下计数器以第一频率的频率（F0）倍工作，其上/下计数输入连接到比较器（1）的输出端，数字 /模拟转换器（16），接收上/下计数器的输出并提供阈值电平（VT）。
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15.发明授权System for correcting errors in data frames having horizontal and vertical parity codes 失效用于校正具有水平和垂直奇偶码的数据帧中的错误的系统
公开(公告)号：US6032283A
公开(公告)日：2000-02-29
申请号：US893217
申请日：1997-07-15
Applicant: Jacques Meyer
Inventor： Jacques Meyer
CPC classification number: H03M13/2948 , H03M13/151 , H03M13/29 , H03M13/2915 , H03M13/2918 , H03M13/293 , H03M13/1515 , H03M13/152
Abstract: The present invention relates to a method for correcting errors in a data frame including horizontal parity data enabling correction of errors in the rows of the frame based on horizontal syndromes calculated on the rows, and vertical parity data enabling correction of errors in the columns of the frame based on vertical syndromes calculated on the columns. The method includes the steps of calculating, on the fly, the horizontal and vertical syndromes of a current frame on the data of the current frame being received in a slow memory, storing these syndromes in a fast memory area, and, as the data of the next frame are being received in the slow memory, finding the values and positions of the errors of the current frame based on the syndromes stored in the fast memory area.
Abstract translation: 本发明涉及一种用于校正数据帧中的错误的方法，该数据帧包括水平奇偶校验数据，该水平奇偶校验数据使得能够基于在行上计算出的水平校正子校正帧的行中的错误，以及能够修正列中的错误的垂直奇偶校验数据 基于在列上计算的垂直综合征的框架。 该方法包括以下步骤：即时地计算当前帧的水平和垂直综合征对在慢存储器中接收的当前帧的数据，将这些综合征存储在快速存储区域中，并且作为数据 正在慢速存储器中接收下一帧，基于存储在快速存储器区域中的校正子来找出当前帧的错误的值和位置。
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Patent Agency Ranking
公开(公告)号：US5818854A
公开(公告)日：1998-10-06
申请号：US493852
申请日：1995-06-22
Applicant: Jacques Meyer
Inventor： Jacques Meyer
CPC classification number: H03M13/151
Abstract: A Reed-Solomon decoder receives code sequences of M coefficients having a maximum value N, t of which can be corrected. The Reed-Solomon decoder includes 2t polynomial counters successively receiving the M coefficients of each code sequence, the polynomial counter of rank i (i=0,1 . . . 2t-1), providing the coefficient of the term of degree i of a syndrome polynomial. A circuit provides the coefficients of an error locator polynomial from the coefficients of the syndrome polynomial. Another circuit finds the roots of the error locator polynomial by successively trying values .alpha..sup.1 to .alpha..sup.M. The polynomial counter of rank i is preceded by a multiplier by .alpha..sup.(B+i)(N-M), .alpha..sup.B+i being the i-th root of the code generator polynomial.
Abstract translation: Reed-Solomon解码器接收具有最大值N的M个系数的码序列，其中t可以被校正。 Reed-Solomon解码器包括连续接收每个码序列的M个系数的2t多项式计数器，等级i（i = 0,1 ... 2t-1）的多项式计数器，提供a 综合多项式。 电路根据校正子多项式的系数提供误差定位多项式的系数。 另一个电路通过连续地尝试α1到αM来找出误差定位多项式的根。秩i的多项式计数器之前是α（B + i）（NM）的乘数，αB + i是i- 代码生成器多项式的根。
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公开(公告)号：US5802115A
公开(公告)日：1998-09-01
申请号：US697406
申请日：1996-08-23
Applicant: Jacques Meyer
Inventor： Jacques Meyer
CPC classification number: H03M13/23
Abstract: A convolution decoder includes, for each state S of a shift register receiving an initial signal, an add-compare-select circuit which provides a one-bit decision for selecting either one of states 2S or 2S+1 as a state preceding the current state S. A decoding element traces back the memory according to a path indicated by the decisions stored in the memory in order to restore the succession of states of the initial signal. Each calculation cell associated with a state S further includes means for establishing a complex R-bit decision comprising, by decreasing weight, the one-bit decision of the calculation cell and the R-1 most significant bits of the complex decision established by the cell associated with the selected state 2S or 2S+1.
Abstract translation: 卷积解码器包括：对于接收初始信号的移位寄存器的每个状态S，提供用于选择状态2S或2S + 1中的任何一个的一位决定作为当前状态之前的状态的加法比较选择电路 解码元件根据由存储在存储器中的判定指示的路径来跟踪存储器，以恢复初始信号的状态的连续。 与状态S相关联的每个计算单元进一步包括用于建立复杂R位决定的装置，包括通过减小计算单元的一位决定权重和由单元建立的复合决策的R-1最高有效位 与所选择的状态2S或2S + 1相关联。
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18.发明授权Circuit for extracting a synchronization signal from a composite video signal, in MOS technology 失效在MOS技术中从复合视频信号中提取同步信号的电路
公开(公告)号：US5502500A
公开(公告)日：1996-03-26
申请号：US54592
申请日：1993-04-29
Applicant: Jacques Meyer
Inventor： Jacques Meyer
IPC: H04N5/08
CPC classification number: H04N5/08
Abstract: A circuit that extracts the synchronization signal from a composite video signal. The circuit includes a stage for aligning the low level of the synchronization signal interval with a reference voltage; a stage for detecting the signal suppression level and a comparator for comparing the aligned video signal with a value intermediate between the low level of the synchronization interval and the signal suppression level. The detecting stage includes a second comparator charging or discharging a capacitor depending on the polarity of the voltage difference across its inputs. The ratio Ic/Id between the values of the charging and discharging currents is selected (approximately equal to 8 in one embodiment) to obtain the suitable value Vsup at the second input of the comparator.
Abstract translation: 从复合视频信号中提取同步信号的电路。 电路包括用于使同步信号间隔的低电平与参考电压对准的级; 用于检测信号抑制电平的级和比较器，用于将对准的视频信号与在同步间隔的低电平和信号抑制电平之间的中间值进行比较。 检测级包括第二比较器，根据其输入端的电压差的极性对电容器进行充电或放电。 选择充电和放电电流值之间的比率Ic / Id（在一个实施例中大约等于8），以在比较器的第二输入端获得合适的值Vsup。
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公开(公告)号：US4307153A
公开(公告)日：1981-12-22
申请号：US62054
申请日：1979-07-30
Applicant: Daniel Bernelin , Jacques Meyer
Inventor： Daniel Bernelin , Jacques Meyer
CPC classification number: C08G63/20 , C09D167/00 , Y10S524/901 , Y10S524/902 , Y10S524/904 , Y10T428/31511 , Y10T428/31529 , Y10T428/31786
Abstract: Curable, saturated polyester resins and epoxy resin cross-linking agents therefor, in association with an at least divalent metal oxide and a cross-linking catalyst, are useful binders for mechanically improved powder paints, e.g., those typically applied to metallic substrates by electrostatic deposition or fluidized bed spraying.
Abstract translation: 与至少二价金属氧化物和交联催化剂相结合的可固化的饱和聚酯树脂和环氧树脂交联剂是用于机械改进的粉末涂料的有用粘合剂，例如通常通过静电沉积施用于金属基材的那些 或流化床喷雾。
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公开(公告)号：USRE30102E
公开(公告)日：1979-09-25
申请号：US885107
申请日：1978-03-09
Applicant: Philippe Thomas , Jacques Meyer , Jacques M. D'Avigneau
Inventor： Philippe Thomas , Jacques Meyer , Jacques M. D'Avigneau
CPC classification number: C09D167/00 , C08K5/12 , Y10T428/31794
Abstract: The invention relates to compounds based on saturated polyester and cross-linking agent. The compositions comprise a saturated polyester with terminal hydroxyl groups and a cross-linking agent consisting of a dianhydride with ester groups, the product of reaction between a trimellitic anhydride and a diol. Use of the compounds as a binder for powder paints applicable to the automobile, electrical household goods, agricultural machinery and lead industries.
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