公开(公告)号：US08017423B2

公开(公告)日：2011-09-13

申请号：US12561344

申请日：2009-09-17

申请人： Seongyeol Yoo ,  Youngsuk Song ,  Seungjin Choi

发明人： Seongyeol Yoo ,  Youngsuk Song ,  Seungjin Choi

IPC分类号： H01L21/00

CPC分类号： H01L29/78603 ,  H01L27/1218 ,  H01L29/66765

摘要： The present invention discloses a method for manufacturing thin film structure, which comprises the following steps: providing a substrate having a first recess and a second recess formed therein with the first recess being deeper than the second recess; depositing a first material layer and a second material layer of different thicknesses successively on the substrate; and grinding the substrate so that a flat upper surface is formed and the first material layer and the second material layer are remained in the first recess while only the first material layer is remained in the second recess. The present invention also discloses a method for manufacturing fringe field switching type liquid crystal display array substrate. With the present invention, it is possible to make the upper surface flat while forming patterns on two layers of thin films respectively by using a single mask.

摘要翻译： 本发明公开了一种制造薄膜结构的方法，包括以下步骤：提供具有第一凹部和形成在其中的第二凹部的基板，其中第一凹部比第二凹部更深; 在衬底上依次沉积不同厚度的第一材料层和第二材料层; 并且研磨所述基板，使得形成平坦的上表面，并且所述第一材料层和所述第二材料层保留在所述第一凹部中，同时仅所述第一材料层保留在所述第二凹部中。 本发明还公开了一种用于制造条纹场开关型液晶显示阵列基板的方法。 利用本发明，可以通过使用单个掩模分别在两层薄膜上形成图案而使上表面平坦。

公开(公告)号：US07834360B2

公开(公告)日：2010-11-16

申请号：US12126253

申请日：2008-05-23

申请人： Seungjin Choi ,  Youngsuk Song

发明人： Seungjin Choi ,  Youngsuk Song

IPC分类号： H01L27/14

CPC分类号： H01L27/124 ,  G02F1/136259

摘要： The present invention relates to a thin film transistor array substrate comprising a gate line and a data line that are separated by an insulting layer and intersecting each other to define a pixel, wherein a data auxiliary line is disposed adjacent to an intersection portion between the data line and the gate line, and both ends of the data auxiliary line are on two sides of the intersection portion and connected with the data lines, respectively.

摘要翻译： 薄膜晶体管阵列基板技术领域本发明涉及一种薄膜晶体管阵列基板，包括由绝缘层分隔开并彼此相交以限定像素的栅极线和数据线，其中数据辅助线邻近数据之间的相交部分设置 线和栅极线，数据辅助线的两端分别在交叉部分的两侧并与数据线连接。

公开(公告)号：US08703510B2

公开(公告)日：2014-04-22

申请号：US13278360

申请日：2011-10-21

申请人： Youngsuk Song ,  Seungjin Choi ,  Seongyeol Yoo

发明人： Youngsuk Song ,  Seungjin Choi ,  Seongyeol Yoo

IPC分类号： H01L21/00 ,  H01L21/84 ,  H01L21/331 ,  H01L21/8222

CPC分类号： H01L27/1288 ,  G02F2001/136236

摘要： An embodiment of the invention provides a method for manufacturing an array substrate, wherein the procedure for forming a data line, an active layer with a channel, a source electrode, a drain electrode and a pixel electrode comprises applying a photoresist on a data line metal thin film and performing exposure and development processes by using a multi-tone mask so as to form a photoresist pattern including a third thickness region, a second thickness region and a first thickness region whose thicknesses are successively increased, the third thickness region at least corresponding to the pixel electrode, the second thickness region corresponding to the data line, the active layer, the source electrode and the drain electrode, and the first thickness region corresponding to the other regions.

摘要翻译： 本发明的一个实施例提供了一种用于制造阵列基板的方法，其中用于形成数据线的步骤，具有沟道的有源层，源电极，漏电极和像素电极包括在数据线金属 薄膜，并通过使用多色调掩模进行曝光和显影处理，以形成包括第三厚度区域，第二厚度区域和厚度依次增加的第一厚度区域的光致抗蚀剂图案，第三厚度区域至少相应地 对应于数据线，有源层，源电极和漏电极的第二厚度区域和对应于其它区域的第一厚度区域到像素电极。

公开(公告)号：US08497966B2

公开(公告)日：2013-07-30

申请号：US12836028

申请日：2010-07-14

申请人： Seungjin Choi ,  Youngsuk Song ,  Seongyeol Yoo

发明人： Seungjin Choi ,  Youngsuk Song ,  Seongyeol Yoo

IPC分类号： G02F1/1343

CPC分类号： H01L27/1288 ,  G02F1/134363 ,  G02F2001/134372 ,  H01L27/1214

摘要： A manufacturing method for an FFS type TFT-LCD array substrate comprises: depositing a first metal film on a transparent substrate, and form a gate line, a gate electrode and a common electrode line by a first patterning process; depositing a gate insulating layer, an active layer film and a second metal film sequentially and patterning the second metal film and the active layer film by a second patterning process; Step 3 depositing a first transparent conductive film and patterning the first transparent conductive film, the second metal film and the active layer film by a third patterning process; depositing a passivation layer, forming a connection hole by patterning the passivation layer through the fourth patterning process, performing an ashing process on photoresist used in the fourth patterning process, depositing a second transparent conductive layer on the remaining photoresist, and forming a common electrode by a lifting-off process.

摘要翻译： 一种FFS型TFT-LCD阵列基板的制造方法，其特征在于，在第一图案形成工序中，在透明基板上淀积第一金属膜，形成栅极线，栅电极，公共电极线; 依次沉积栅极绝缘层，有源层膜和第二金属膜，并通过第二图案化工艺图案化第二金属膜和有源层膜; 步骤3沉积第一透明导电膜并通过第三图案化工艺图案化第一透明导电膜，第二金属膜和有源层膜; 沉积钝化层，通过第四图案化工艺图案化钝化层形成连接孔，在第四图案化工艺中使用的光致抗蚀剂上进行灰化处理，在剩余光致抗蚀剂上沉积第二透明导电层，并通过 起吊过程。

公开(公告)号：US08298878B2

公开(公告)日：2012-10-30

申请号：US12784759

申请日：2010-05-21

申请人： Seongyeol Yoo ,  Seungjin Choi ,  Youngsuk Song

发明人： Seongyeol Yoo ,  Seungjin Choi ,  Youngsuk Song

IPC分类号： H01L21/00

CPC分类号： H01L27/1288 ,  H01L27/1214

摘要： The embodiment of the invention provides a manufacturing method for a thin film transistor liquid crystal display (TFT-LCD) array substrate, the manufacturing method comprises: step 1, depositing a transparent conductive film, a source/drain metal film and a doped semiconductor film on a transparent substrate sequentially, forming patterns of a doped semiconductor layer, a source electrode and a drain electrode of a thin film transistor, a data line and a pixel electrode by a first patterning process, wherein the doped semiconductor layer remains on the source electrode and the drain electrode; Step 2, depositing a semiconductor film on the whole transparent substrate after Step 1, forming a pattern of a semiconductor layer which includes a channel of the thin film transistor by a second patterning process; Step 3, depositing an insulating film and a gate metal film on the whole transparent substrate after Step 2, forming patterns of a gate line and a gate electrode of the thin film transistor by a third patterning process, wherein the gate electrode is located above the channel of the thin film transistor.

摘要翻译： 本发明的实施例提供一种薄膜晶体管液晶显示（TFT-LCD）阵列基板的制造方法，其制造方法包括：步骤1，沉积透明导电膜，源/漏金属膜和掺杂半导体膜 在透明基板上顺序地通过第一图案化工艺形成薄膜晶体管，数据线和像素电极的掺杂半导体层，源电极和漏电极的图案，其中掺杂半导体层保留在源极上 和漏电极; 步骤2，在步骤1之后，在整个透明衬底上沉积半导体膜，通过第二图案化工艺形成包括薄膜晶体管的沟道的半导体层的图案; 步骤3，在步骤2之后，在整个透明基板上沉积绝缘膜和栅极金属膜，通过第三图案化工艺形成薄膜晶体管的栅极线和栅电极的图案，其中栅电极位于 通道的薄膜晶体管。

公开(公告)号：US20100075450A1

公开(公告)日：2010-03-25

申请号：US12565953

申请日：2009-09-24

申请人： Seungjin Choi ,  Youngsuk Song ,  Seongyeol Yoo

发明人： Seungjin Choi ,  Youngsuk Song ,  Seongyeol Yoo

IPC分类号： H01L21/28

CPC分类号： H01L27/1288 ,  G02F1/1368 ,  H01L27/1214

摘要： A method for manufacturing an array substrate of liquid crystal display comprising the following steps: providing a substrate having gate lines, a gate insulating layer and an active layer pattern formed thereon in this order; depositing a first transparent conductive layer and a source/drain metal layer in this order on the substrate; forming a photoresist pattern layer on the source/drain metal layer through a triple-tone mask; performing a wet-etching process on the source/drain metal layer and the first transparent conductive layer exposed from the photoresist pattern layer; performing a first ashing process on the photoresist pattern layer and performing a dry-etching process on the source/drain metal layer, the first transparent conductive layer and the active layer pattern exposed by the first ashing process; performing a second ashing process on the photoresist pattern layer and performing a wet-etching process on the source/drain metal layer exposed by the second ashing process; and removing the remaining photoresist pattern layer. According to the invention, the over-etching on the TFT channel region can be reduced and the display quality of the liquid crystal display can be ensured.

摘要翻译： 一种制造液晶显示器阵列基板的方法，包括以下步骤：依次提供具有栅极线，栅极绝缘层和有源层图案的基板; 在衬底上依次沉积第一透明导电层和源极/漏极金属层; 通过三色调掩模在源极/漏极金属层上形成光致抗蚀剂图案层; 对源极/漏极金属层和从光致抗蚀剂图案层露出的第一透明导电层进行湿法蚀刻工艺; 在所述光致抗蚀剂图案层上进行第一灰化处理，对所述源极/漏极金属层，所述第一透明导电层和所述有源层图案进行第一灰化处理曝光的干蚀刻处理; 在光致抗蚀剂图案层上进行第二灰化处理，并对通过第二灰化处理暴露的源极/漏极金属层进行湿法蚀刻处理; 并除去剩余的光致抗蚀剂图案层。 根据本发明，可以减少TFT沟道区上的过蚀刻，并且可以确保液晶显示器的显示质量。

公开(公告)号：US20090085034A1

公开(公告)日：2009-04-02

申请号：US12126253

申请日：2008-05-23

申请人： Seungjin Choi ,  Youngsuk Song

发明人： Seungjin Choi ,  Youngsuk Song

IPC分类号： H01L27/12

CPC分类号： H01L27/124 ,  G02F1/136259

摘要： The present invention relates to a thin film transistor array substrate comprising a gate line and a data line that are separated by an insulting layer and intersecting each other to define a pixel, wherein a data auxiliary line is disposed adjacent to an intersection portion between the data line and the gate line, and both ends of the data auxiliary line are on two sides of the intersection portion and connected with the data lines, respectively.

摘要翻译： 薄膜晶体管阵列基板技术领域本发明涉及一种薄膜晶体管阵列基板，包括由绝缘层分隔开并彼此相交以限定像素的栅极线和数据线，其中数据辅助线邻近数据之间的相交部分设置 线和栅极线，数据辅助线的两端分别在交叉部分的两侧并与数据线连接。

公开(公告)号：US09501770B2

公开(公告)日：2016-11-22

申请号：US13264633

申请日：2010-04-15

申请人： Wonjun Lee ,  Seungjin Choi ,  Dongphil Lim ,  Hongkeun Ji ,  Dohyun Jang ,  Sangsoo Oh ,  Hoon Seong

发明人： Wonjun Lee ,  Seungjin Choi ,  Dongphil Lim ,  Hongkeun Ji ,  Dohyun Jang ,  Sangsoo Oh ,  Hoon Seong

IPC分类号： G06Q20/00 ,  G06Q20/32 ,  G06Q20/06 ,  G06Q20/10 ,  G06Q20/36 ,  H04M15/00 ,  H04M17/00 ,  H04W4/24

CPC分类号： G06Q20/32 ,  G06Q20/0655 ,  G06Q20/105 ,  G06Q20/363 ,  G06Q20/3672 ,  H04M15/00 ,  H04M15/68 ,  H04M17/20 ,  H04M17/202 ,  H04M17/204 ,  H04M17/205 ,  H04M17/206 ,  H04W4/24

摘要： E-money recharge service system, e-money recharge server, and recharge method are disclosed. The e-money recharge service system includes: recipient terminal for receiving and storing e-money; payer terminal for performing settlement approval procedure for payment of e-money loaded into recipient terminal; and money recharge server for receiving input of money information including information on the whole or part of identification of recipient terminal, identification of payer terminal, recharge amount, and methods of payment from subscriber to money recharge service, for the subscriber acting money payer recharging the recipient terminal with e-money corresponding to recharge amount and making payment for settling recharge amount of money through the methods of payment, and for the subscriber acting money recipient transmitting message of inquiry to payer terminal of settlement approval of recharge amount and recharging recipient terminal with e-money corresponding to recharge amount if settlement approval is issued by payer terminal.

摘要翻译： 披露电子货币充值服务系统，电子货币充值服务器和充值方式。 电子货币充值服务系统包括：接收和存储电子货币的接收方; 付款人终端执行结算批准程序，用于支付加载到接收方终端的电子货币; 以及用于从订户到货币充值服务接收输入货币信息的信息，包括关于接收方终端的识别，付款人终端的识别，充值金额以及付款方式的信息的输入的货币充值服务器， 收款终端，电子货币对应于充值金额，并通过付款方式支付结算充值金额，并为用户代理货币收款人发送查询付款人付款人终端的充值金额和充值接收方终端的付款人 付款人终端发出结算许可的电子货币对应的充值金额。

公开(公告)号：US20140054581A1

公开(公告)日：2014-02-27

申请号：US13878475

申请日：2012-12-23

申请人： Youngsuk Song ,  Guanbao Hui ,  Seongyeol Yoo ,  Seungjin Choi ,  Feng Zhang

发明人： Youngsuk Song ,  Guanbao Hui ,  Seongyeol Yoo ,  Seungjin Choi ,  Feng Zhang

IPC分类号： H01L27/12

CPC分类号： H01L27/124 ,  G02F1/1343 ,  G02F1/1362 ,  G02F1/136209 ,  G02F2001/134318 ,  G02F2001/134372 ,  G02F2001/136222 ,  G02F2203/01 ,  G02F2203/02 ,  H01L27/1259

摘要： Embodiments of the invention relate to an array substrate, a manufacturing method thereof and a display device comprising the array substrate. The array substrate comprises a gate line and a data line which define a pixel region, the pixel region comprises a thin film transistor region and an electrode pattern region, a gate electrode, a gate insulation layer, an active layer, a source electrode, a drain electrode and a passivation layer are formed in the thin film transistor region, the gate insulation layer, a pixel electrode, the passivation layer and a common electrode are formed in the electrode pattern region, and the common electrode and the pixel electrode form a multi-dimensional electric field. A color resin layer is formed between the gate insulation layer and the pixel electrode.

摘要翻译： 本发明的实施例涉及阵列基板，其制造方法和包括阵列基板的显示装置。 阵列基板包括栅极线和限定像素区域的数据线，像素区域包括薄膜晶体管区域和电极图案区域，栅极电极，栅极绝缘层，有源层，源极电极， 漏电极和钝化层形成在薄膜晶体管区域中，栅极绝缘层，像素电极，钝化层和公共电极形成在电极图案区域中，并且公共电极和像素电极形成多个 维电场。 在栅极绝缘层和像素电极之间形成着色树脂层。

公开(公告)号：US08603843B2

公开(公告)日：2013-12-10

申请号：US13381157

申请日：2011-04-26

申请人： Youngsuk Song ,  Seungjin Choi ,  Seongyeol Yoo

发明人： Youngsuk Song ,  Seungjin Choi ,  Seongyeol Yoo

IPC分类号： H01L21/00

CPC分类号： H01L27/1288 ,  G02F1/13458 ,  G02F1/136227 ,  G02F2001/134372 ,  G02F2001/136231 ,  H01L27/1214 ,  H01L27/124

摘要： Disclosed is a method for manufacturing an array substrate of an FFS type TFT-LCD, comprising the steps of: forming a first transparent conductive film, a first metal film and an impurity-doped semiconductor film on a transparent substrate sequentially, and then patterning the stack of the films to form patterns including source electrodes, drain electrodes, data lines and pixel electrodes; forming a semiconductor film and patterning it to form a pattern of the impurity-doped semiconductor layer and a pattern of the semiconductor layer including TFT channels; forming an insulating film and a second metal film, and patterning the stack of the films to form patterns including connection holes of the data lines in a PAD region, gate lines, gate electrodes and common electrode lines; forming a second transparent conductive film, and patterning it to form patterns including the common electrode.

摘要翻译： 公开了一种用于制造FFS型TFT-LCD的阵列基板的方法，包括以下步骤：依次在透明基板上形成第一透明导电膜，第一金属膜和杂质掺杂半导体膜，然后将 堆叠的膜以形成包括源电极，漏电极，数据线和像素电极的图案; 形成半导体膜并对其进行构图以形成杂质掺杂半导体层的图案和包括TFT沟道的半导体层的图案; 形成绝缘膜和第二金属膜，并且图案化所述膜的堆叠以形成包括PAD区域，栅极线，栅电极和公共电极线中的数据线的连接孔的图案; 形成第二透明导电膜，并将其图形化以形成包括公共电极的图案。