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    System for method of predicting power events in an intermittent power environment and dispatching computational operations of an integrated circuit accordingly
    11.
    发明授权
    System for method of predicting power events in an intermittent power environment and dispatching computational operations of an integrated circuit accordingly 有权
    用于在间歇电力环境中预测电力事件的方法的系统，并相应地调度集成电路的计算操作

    公开(公告)号：US07732949B2

    公开(公告)日：2010-06-08

    申请号：US11550573

    申请日：2006-10-18

    申请人： Kenneth J. Goodnow ,  Clarence R. Ogilvie ,  Sebastian T. Ventrone ,  Keith R. Williams

    发明人： Kenneth J. Goodnow ,  Clarence R. Ogilvie ,  Sebastian T. Ventrone ,  Keith R. Williams

    IPC分类号： G05F3/06 ,  G06F1/00

    CPC分类号： C09K11/77 ,  G06F1/3203

    摘要： A system and method of predicting power events in intermittent power environments and dispatching computational operations of an integrated circuit accordingly. A power management prediction system includes a controller executing a prediction algorithm, an arrangement of computation circuitry, a non-volatile storage device containing a power requirements log and a power history log, a clock generator, an intermittent power source, and a power monitor circuit. A method of predicting intermittent power events and dispatching computational operations includes: storing power requirements of each computational operation, monitoring the intermittent power source to generate a history log, predicting a subsequent power event based on the history log, retrieving actual power requirements of one or more computational operations, comparing the predicted power event with actual power requirements, determining whether actual power requirements are satisfied, dispatching one or more computational operations that correspond to one or more actual power events, or performing an error recovery operation.

    摘要翻译： 一种在间歇电力环境中预测电力事件并相应地调度集成电路的计算操作的系统和方法。 功率管理预测系统包括执行预测算法的控制器，计算电路的布置，包含电力需求日志和电力历史记录的非易失性存储装置，时钟发生器，间歇电源和功率监视电路 。 一种预测间歇功率事件和调度计算操作的方法包括：存储每个计算操作的功率需求，监测间歇电源以生成历史日志，基于历史日志预测随后的功率事件，检索一个或者 更多的计算操作，将预测功率事件与实际功率需求进行比较，确定是否满足实际功率需求，调度与一个或多个实际功率事件相对应的一个或多个计算操作，或执行错误恢复操作。

    Structure for a System and Method of Predicting Power Events in an Intermittent Power Environment and Dispatching Computational Operations of an Integrated Circuit Accordingly
    12.
    发明申请
    Structure for a System and Method of Predicting Power Events in an Intermittent Power Environment and Dispatching Computational Operations of an Integrated Circuit Accordingly 有权
    一种系统的结构和预测间歇电力环境中的电力事件的方法和集成电路的调度运算

    公开(公告)号：US20090125744A1

    公开(公告)日：2009-05-14

    申请号：US11938899

    申请日：2007-11-13

    申请人： Kenneth J. Goodnow ,  Clarence R. Ogilvie ,  Sebastian T. Ventrone ,  Keith R. Williams

    发明人： Kenneth J. Goodnow ,  Clarence R. Ogilvie ,  Sebastian T. Ventrone ,  Keith R. Williams

    IPC分类号： G06F1/28

    CPC分类号： G06F1/3203 ,  G06F1/3287 ,  Y02D10/171

    摘要： A design structure for a system and method of predicting power events in intermittent power environments and dispatching computational operations of an integrated circuit accordingly. A power management prediction system includes a controller executing a prediction algorithm, an arrangement of computation circuitry, a non-volatile storage device containing a power requirements log and a power history log, a clock generator, an intermittent power source, and a power monitor circuit. A method of predicting intermittent power events and dispatching computational operations includes: storing power requirements of each computational operation, monitoring the intermittent power source to generate a history log, predicting a subsequent power event based on the history log, retrieving actual power requirements of one or more computational operations, comparing the predicted power event with actual power requirements, determining whether actual power requirements are satisfied, dispatching one or more computational operations that correspond to one or more actual power events, or performing an error recovery operation.

    摘要翻译： 一种用于系统的设计结构以及在间歇电力环境中预测电力事件并相应地调度集成电路的计算操作的方法。 功率管理预测系统包括执行预测算法的控制器，计算电路的布置，包含电力需求日志和电力历史记录的非易失性存储装置，时钟发生器，间歇电源和功率监视电路 。 一种预测间歇功率事件和调度计算操作的方法包括：存储每个计算操作的功率需求，监测间歇电源以生成历史日志，基于历史日志预测随后的功率事件，检索一个或者 更多的计算操作，将预测功率事件与实际功率需求进行比较，确定是否满足实际功率需求，调度与一个或多个实际功率事件相对应的一个或多个计算操作，或执行错误恢复操作。

    STRUCTURE AND METHOD TO OPTIMIZE COMPUTATIONAL EFFICIENCY IN LOW-POWER ENVIRONMENTS
    13.
    发明申请
    STRUCTURE AND METHOD TO OPTIMIZE COMPUTATIONAL EFFICIENCY IN LOW-POWER ENVIRONMENTS 有权
    优化低功率环境下计算效率的结构与方法

    公开(公告)号：US20090024862A1

    公开(公告)日：2009-01-22

    申请号：US11779432

    申请日：2007-07-18

    申请人： Kenneth J. Goodnow ,  Clarence R. Ogilvie ,  Sebastian T. Ventrone ,  Keith Williams ,  Charles S. Woodruff

    发明人： Kenneth J. Goodnow ,  Clarence R. Ogilvie ,  Sebastian T. Ventrone ,  Keith Williams ,  Charles S. Woodruff

    IPC分类号： G06F1/30

    CPC分类号： G06F1/3203

    摘要： A method and structure to optimize computational efficiency in a low-power environment. The method includes determining an optimal point for maximizing computational efficiency in a low-power environment, and selectively controlling operation of at least one processing unit of a plurality of processing units in accordance with the determined optimal point. The structure includes a plurality of processing units, a load manager controlling selective parallel operation of at least one processing unit of the plurality of processing units, and an unregulated power source.

    摘要翻译： 一种在低功耗环境下优化计算效率的方法和结构。 该方法包括确定用于在低功率环境中最大化计算效率的最佳点，以及根据所确定的最佳点选择性地控制多个处理单元中的至少一个处理单元的操作。 该结构包括多个处理单元，控制多个处理单元中的至少一个处理单元的选择性并行操作的负载管理器和未调节的电源。

    Processor pipeline architecture logic state retention systems and methods
    15.
    发明授权
    Processor pipeline architecture logic state retention systems and methods 有权
    处理器管道架构逻辑状态保留系统和方法

    公开(公告)号：US07937560B2

    公开(公告)日：2011-05-03

    申请号：US12121292

    申请日：2008-05-15

    申请人： Kerry Bernstein ,  Kenneth J. Goodnow ,  Clarence R. Ogilvie ,  Christopher B. Reynolds ,  Sebastian T. Ventrone ,  Keith R. Williams

    发明人： Kerry Bernstein ,  Kenneth J. Goodnow ,  Clarence R. Ogilvie ,  Christopher B. Reynolds ,  Sebastian T. Ventrone ,  Keith R. Williams

    IPC分类号： G06F15/76 ,  G06F1/00

    CPC分类号： G06F9/3867 ,  G06F1/32 ,  G06F1/3287 ,  G06F11/1407 ,  G06F11/1441 ,  Y02D10/171

    摘要： A solution for retaining a logic state of a processor pipeline architecture are disclosed. A comparator is positioned between two stages of the processor pipeline architecture. A storage capacitor is coupled between a storage node of the comparator and a ground to store an output of the early one of the two stages. A reference logic is provided, which has the same value as the output of the early stage. A logic storing and dividing device is coupled between the reference logic and a reference node of the comparator to generate a logic at the reference node, which is a fraction of the reference logic, and to retain a logic state of the information stored on the storage capacitor. Further mechanisms are provided to determine validity of data stored in the logic storing and dividing device.

    摘要翻译： 公开了一种用于保留处理器流水线架构的逻辑状态的解决方案。 比较器位于处理器流水线架构的两个阶段之间。 存储电容器耦合在比较器的存储节点和地之间以存储两个阶段的早期阶段的输出。 提供了与早期输出值相同的参考逻辑。 逻辑存储和分配装置耦合在参考逻辑和比较器的参考节点之间，以便在参考节点产生逻辑，该参考节点是参考逻辑的一小部分，并且保留存储在存储器上的信息的逻辑状态 电容器。 提供进一步的机制来确定存储在逻辑存储和分配装置中的数据的有效性。

    Structure for a system and method of predicting power events in an intermittent power environment and dispatching computational operations of an integrated circuit accordingly
    16.
    发明授权
    Structure for a system and method of predicting power events in an intermittent power environment and dispatching computational operations of an integrated circuit accordingly 有权
    一种用于预测间歇电力环境中的电力事件并且相应地调度集成电路的计算操作的系统和方法的结构

    公开(公告)号：US07895459B2

    公开(公告)日：2011-02-22

    申请号：US11938899

    申请日：2007-11-13

    申请人： Kenneth J. Goodnow ,  Clarence R. Ogilvie ,  Sebastian T. Ventrone ,  Keith R. Williams

    发明人： Kenneth J. Goodnow ,  Clarence R. Ogilvie ,  Sebastian T. Ventrone ,  Keith R. Williams

    IPC分类号： G06F1/00

    CPC分类号： G06F1/3203 ,  G06F1/3287 ,  Y02D10/171

    摘要： A design structure for a system and method of predicting power events in intermittent power environments and dispatching computational operations of an integrated circuit accordingly. A power management prediction system includes a controller executing a prediction algorithm, an arrangement of computation circuitry, a non-volatile storage device containing a power requirements log and a power history log, a clock generator, an intermittent power source, and a power monitor circuit. A method of predicting intermittent power events and dispatching computational operations includes: storing power requirements of each computational operation, monitoring the intermittent power source to generate a history log, predicting a subsequent power event based on the history log, retrieving actual power requirements of one or more computational operations, comparing the predicted power event with actual power requirements, determining whether actual power requirements are satisfied, dispatching one or more computational operations that correspond to one or more actual power events, or performing an error recovery operation.

    摘要翻译： 一种用于系统的设计结构以及在间歇电力环境中预测电力事件并相应地调度集成电路的计算操作的方法。 功率管理预测系统包括执行预测算法的控制器，计算电路的布置，包含电力需求日志和电力历史记录的非易失性存储装置，时钟发生器，间歇电源和功率监视电路 。 一种预测间歇功率事件和调度计算操作的方法包括：存储每个计算操作的功率需求，监测间歇电源以生成历史日志，根据历史日志预测后续功率事件，检索一个或者 更多的计算操作，将预测功率事件与实际功率需求进行比较，确定是否满足实际功率需求，调度与一个或多个实际功率事件相对应的一个或多个计算操作，或执行错误恢复操作。

    STRUCTURE AND METHOD TO OPTIMIZE COMPUTATIONAL EFFICIENCY IN LOW-POWER ENVIRONMENTS
    19.
    发明申请
    STRUCTURE AND METHOD TO OPTIMIZE COMPUTATIONAL EFFICIENCY IN LOW-POWER ENVIRONMENTS 有权
    优化低功率环境下计算效率的结构与方法

    公开(公告)号：US20090024859A1

    公开(公告)日：2009-01-22

    申请号：US11870575

    申请日：2007-10-11

    申请人： Kenneth J GOODNOW ,  Clarence R. Ogilvie ,  Sebastian T. Ventrone ,  Keith Williams ,  Charles S. Woodruff

    发明人： Kenneth J GOODNOW ,  Clarence R. Ogilvie ,  Sebastian T. Ventrone ,  Keith Williams ,  Charles S. Woodruff

    IPC分类号： G06F1/32

    CPC分类号： G06F1/26

    摘要： A method and structure to optimize computational efficiency in a low-power environment. A design structure is embodied in a machine readable medium used in a design process. The design structure includes a component to determine an optimal point for maximizing computational efficiency in a low-power environment, and a component to selectively control operation of at least one processing unit of a plurality of processing units in accordance with the determined optimal point. The design structure further includes at least one of a component for controlling a frequency of a clock signal transmitted to the at least one processing unit in accordance with the determined optimal point, and a component for determining a present power available.

    摘要翻译： 一种在低功耗环境下优化计算效率的方法和结构。 设计结构体现在在设计过程中使用的机器可读介质中。 该设计结构包括确定用于在低功率环境中最大化计算效率的最佳点的组件，以及根据所确定的最佳点选择性地控制多个处理单元的至少一个处理单元的操作的组件。 该设计结构还包括用于根据确定的最佳点来控制发送到至少一个处理单元的时钟信号的频率的组件和用于确定当前可用功率的组件中的至少一个。

    System and Method for Dynamically Executing a Function in a Programmable Logic Array
    20.
    发明申请
    System and Method for Dynamically Executing a Function in a Programmable Logic Array 失效
    用于在可编程逻辑阵列中动态执行功能的系统和方法

    公开(公告)号：US20080290896A1

    公开(公告)日：2008-11-27

    申请号：US12185467

    申请日：2008-08-04

    申请人： Kenneth J. Goodnow ,  Clarence R. Ogilvie ,  Christopher B. Reynolds ,  Jack R. Smith ,  Sebastian T. Ventrone

    发明人： Kenneth J. Goodnow ,  Clarence R. Ogilvie ,  Christopher B. Reynolds ,  Jack R. Smith ,  Sebastian T. Ventrone

    IPC分类号： H03K19/173

    CPC分类号： H03K19/17752 ,  G06F15/7867 ,  H03K19/17756 ,  H03K19/1776

    摘要： A reconfigurable logic array (RLA) system that includes an RLA and a programmer for reprogramming the RLA on a cyclical basis. A function (F) requiring a larger amount of logic than contained in the RLA is partitioned into multiple functional blocks. The programmer contains software that partitions the RLA into a function region FR located between two storage regions SR1, SR2. The programmer then programs functional region sequentially with the functional blocks of the function so that the functional blocks process in alternating directions between the storage regions. While the programmer is reconfiguring function region with the next functional block and reconfiguring one of the storage regions for receiving the output of the next functional block, data being passed from the current functional block to the next functional block is held in the other storage region.

    摘要翻译： 可重构逻辑阵列（RLA）系统，其包括RLA和用于在循环基础上重新编程RLA的编程器。 需要比RLA中包含的逻辑量​​大的函数（F）被划分为多个功能块。 程序员包含将RLA分割成位于两个存储区域SR1，SR2之间的功能区域FR的软件。 然后，程序员用功能块的功能块顺序地对功能区进行编程，使得功能块在存储区之间交替地进行处理。 当编程器用下一个功能块重新配置功能区域并且重新配置存储区域之一以接收下一个功能块的输出时，从当前功能块传递到下一个功能块的数据被保存在另一个存储区域中。