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    Method of placing elements into receptors in a substrate
    12.
    发明授权
    Method of placing elements into receptors in a substrate 失效
    将元件放置在基底中的受体中的方法

    公开(公告)号：US06794221B2

    公开(公告)日：2004-09-21

    申请号：US09924158

    申请日：2001-08-07

    Applicant: Keyvan Sayyah

    Inventor： Keyvan Sayyah

    IPC: H01L2144

    CPC classification number: H01L25/50 ,  H01L21/48 ,  H01L24/95 ,  H01L2224/95085 ,  H01L2224/95092 ,  H01L2224/95122 ,  H01L2224/95136 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/0101 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01058 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15155 ,  H01L2924/15165 ,  H05K1/0284 ,  H05K3/20 ,  H01L2924/15153 ,  H01L2924/00

    Abstract: A method for transferring of individual devices or circuit elements, fabricated on a semiconducting substrate, to a new substrate and placing said devices and elements in predetermined locations on the new substrate. The method comprises shaping the devices and circuits as truncated cones, lifting them off the original semiconducting substrates and depositing them en masse onto the new substrate, followed by their placing into receptors on the new substrate. The new substrate has preliminarily made receptors in a form of a truncated cone and the devices and circuits fill these receptors. Both the receptors and the devices and circuits have metallization contacts enabling to establish electrical contact between them. A method for real-time monitoring and verification of correctness of placement of the devices and circuits into the receptors by applying voltage pulse waveforms and measuring the resulting current pulse.

    Abstract translation: 一种用于将在半导体衬底上制造的各个器件或电路元件传送到新衬底并将所述器件和元件放置在新衬底上的预定位置的方法。 该方法包括将器件和电路成形为截锥体，将其从原始半导体衬底上提起并将其大量沉积到新衬底上，随后将其放置在新衬底上的受体中。 新的底物预先制成截锥形的受体，并且装置和电路填充这些受体。 受体和器件和电路都具有能够在它们之间建立电接触的金属化接触。 一种通过施加电压脉冲波形并测量所得到的电流脉冲来实时监测和验证器件和电路放置到受体中的正确性的方法。

    Lithium niobate modulator having a doped semiconductor structure for the mitigation of DC bias drift
    13.
    发明授权
    Lithium niobate modulator having a doped semiconductor structure for the mitigation of DC bias drift 有权
    铌酸锂调制器具有用于减轻直流偏置漂移的掺杂半导体结构

    公开(公告)号：US07856156B2

    公开(公告)日：2010-12-21

    申请号：US12196936

    申请日：2008-08-22

    Applicant: Keyvan Sayyah ,  Robert R. Hayes

    Inventor： Keyvan Sayyah ,  Robert R. Hayes

    IPC: G02F1/035 ,  G02F1/01 ,  G02F1/03 ,  G02F1/07

    CPC classification number: G02F1/0316 ,  G02F1/2255 ,  G02F2201/07 ,  G02F2202/10 ,  G02F2203/21

    Abstract: There is provided in one of the embodiments of the disclosure a lithium niobate modulator structure for mitigating DC bias drift comprising a highly doped semiconductor layer patterned above an optical waveguide having one or more DC sections and an RF section, wherein a metal layer or contact is in contact with a portion of the semiconductor layer and a buffer layer is deposited in the RF section. There is provided in another embodiment of the disclosure a method for making a lithium niobate electro-optical modulator for mitigation of DC bias drift.

    Abstract translation: 在本公开的一个实施例中提供了一种用于减轻DC偏置漂移的铌酸锂调制器结构，其包括在具有一个或多个DC部分和RF部分的光波导上图案化的高掺杂半导体层，其中金属层或接触是 与半导体层的一部分接触，并且缓冲层沉积在RF部分中。 在本公开的另一实施例中提供了一种制造用于减轻直流偏置漂移的铌酸锂电光调制器的方法。

    LITHIUM NIOBATE MODULATOR HAVING A DOPED SEMICONDUCTOR STRUCTURE FOR THE MITIGATION OF DC BIAS DRIFT
    14.
    发明申请
    LITHIUM NIOBATE MODULATOR HAVING A DOPED SEMICONDUCTOR STRUCTURE FOR THE MITIGATION OF DC BIAS DRIFT 有权
    具有用于减缓直流偏置干燥的掺杂半导体结构的锂离子调节剂

    公开(公告)号：US20100046878A1

    公开(公告)日：2010-02-25

    申请号：US12196936

    申请日：2008-08-22

    Applicant: Keyvan Sayyah ,  Robert R. Hayes

    Inventor： Keyvan Sayyah ,  Robert R. Hayes

    IPC: G02F1/035 ,  H01L21/02

    CPC classification number: G02F1/0316 ,  G02F1/2255 ,  G02F2201/07 ,  G02F2202/10 ,  G02F2203/21

    Abstract: There is provided in one of the embodiments of the disclosure a lithium niobate modulator structure for mitigating DC bias drift comprising a highly doped semiconductor layer patterned above an optical waveguide having one or more DC sections and an RF section, wherein a metal layer or contact is in contact with a portion of the semiconductor layer and a buffer layer is deposited in the RF section. There is provided in another embodiment of the disclosure a method for making a lithium niobate electro-optical modulator for mitigation of DC bias drift.

    Abstract translation: 在本公开的一个实施例中提供了一种用于减轻DC偏置漂移的铌酸锂调制器结构，其包括在具有一个或多个DC部分和RF部分的光波导上图案化的高掺杂半导体层，其中金属层或接触是 与半导体层的一部分接触，并且缓冲层沉积在RF部分中。 在本公开的另一实施例中提供了一种制造用于减轻直流偏置漂移的铌酸锂电光调制器的方法。

    Frequency tuning of photonic oscillator using amplifier bias voltage
    15.
    发明申请
    Frequency tuning of photonic oscillator using amplifier bias voltage 失效

    公开(公告)号：US20060239695A1

    公开(公告)日：2006-10-26

    申请号：US11325913

    申请日：2006-01-04

    Applicant: Keyvan Sayyah

    Inventor： Keyvan Sayyah

    IPC: H04B10/00

    CPC classification number: G02F1/0121 ,  H03B17/00 ,  H03L7/099

    Abstract: In one implementation of the present invention, a method is provided for frequency tuning of a photonic oscillator. The method includes supplying an optical signal, for example laser light, which is modulated, delayed, and then converted to an electrical signal. The electrical signal is amplified, and used in modulating the optical signal. With this implementation, the frequency of the an output signal of the photonic oscillator is adjusted by adjusting a bias voltage of the amplifier. In some implementations, adjusting the frequency of the output signal further includes using a frequency lock loop circuit. In some implementations, adjusting the frequency of an output signal of the photonic oscillator further comprises adjusting at least one of an phase shifter in series with the amplifier, an optical fiber stretcher, or a bias voltage of a second amplifier. In one embodiment of the present invention, a photonic oscillator is provided including a laser and an optical modulator coupled to the laser. A lightwave delay path is coupled to the optical modulator. In some embodiments, dual lightwave delay paths are provided, such as a long loop delay path and a short loop delay path. A photodetector is coupled between the lightwave delay path and an amplifier. Typically, a bandpass filter is coupled between the amplifier and the modulating input of the optical modulator. A control circuit coupled to the amplifier is constructed so as to be capable of adjusting a bias power to the amplifier so as to shift a frequency of an output of the photonic oscillator. In some embodiments, the control circuit may include a frequency lock loop circuit.

    Semiconductor-based plasmonic phase modulator and method
    17.
    发明授权
    Semiconductor-based plasmonic phase modulator and method 有权
    基于半导体的等离子体相位调制器和方法

    公开(公告)号：US08755648B1

    公开(公告)日：2014-06-17

    申请号：US12645929

    申请日：2009-12-23

    Applicant: Keyvan Sayyah

    Inventor： Keyvan Sayyah

    IPC: G02B6/26 ,  G02B6/42

    CPC classification number: G02F1/035 ,  G02B6/1226 ,  G02F1/025 ,  G02F1/2257 ,  G02F2201/302 ,  G02F2203/10 ,  G02F2203/50

    Abstract: A plasmonic phase modulator and a method of phase modulation employ modulation of surface plasmons. The plasmonic phase modulator includes a semiconductor substrate configured to provide a surface charge that forms a plasmonic channel at the substrate surface. The modulator further includes an electrode and an insulator between the electrode and the semiconductor substrate. The electrode is configured to provide an electric field that influences the surface charge. The electric field includes a bias field component and a modulation field component. The surface plasmon is supported within the plasmonic channel at an interface between the semiconductor substrate surface and the insulator. A phase of the surface plasmon in the plasmonic channel is modulated by changes in the electric field. The method includes propagating the surface plasmon in the plasmonic channel and varying the modulation field component to modulate the phase of the propagating surface plasmon.

    Abstract translation: 等离子体相位调制器和相位调制方法采用表面等离激元的调制。 等离子体相位调制器包括被配置为提供在衬底表面形成等离子体激元通道的表面电荷的半导体衬底。 调制器还包括电极和电极和半导体衬底之间的绝缘体。 电极被配置成提供影响表面电荷的电场。 电场包括偏置场分量和调制场分量。 表面等离子体激元在半导体衬底表面和绝缘体之间的界面处被支撑在等离子体激元通道内。 等离子体激元通道中的表面等离子体的相位由电场的变化来调制。 该方法包括在等离子体信号中传播表面等离子体，并改变调制场分量以调制传播表面等离子体的相位。

    MOS light valve with nematic liquid crystal operating in the surface mode
    20.
    发明授权
    MOS light valve with nematic liquid crystal operating in the surface mode 失效
    具有表面模式的液晶液晶操作的MOS阀

    公开(公告)号：US5245455A

    公开(公告)日：1993-09-14

    申请号：US580394

    申请日：1990-09-10

    Applicant: Keyvan Sayyah ,  Chiung-Sheng Wu

    Inventor： Keyvan Sayyah ,  Chiung-Sheng Wu

    IPC: G02F1/135

    CPC classification number: G02F1/135

    Abstract: A light valve (10) includes a layer of a liquid crystal (16), a MOS substrate structure (18) with a dielectric layer (24) and a semiconductor layer (26), and an optically isolating mirror (14) between the liquid crystal layer (16) and the substrate structure (18). An external AC biasing voltage is applied across the MOS substrate (18) and the liquid crystal layer (16). The liquid crystal layer (16) is sufficiently thick that it operates in the surface birefringent mode with a high contrast ratio and a short response time to changes in the write-in light beam, when a sufficiently high biasing voltage V.sub.p is applied.

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