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41 条记录 (耗时 0.028 秒)

    Laser generated stress waves for stiction repair
    13.
    发明申请
    Laser generated stress waves for stiction repair 有权
    激光产生的应力波用于固定修复

    公开(公告)号：US20070111364A1

    公开(公告)日：2007-05-17

    申请号：US11511858

    申请日：2006-08-28

    申请人： Vijay Gupta

    发明人： Vijay Gupta

    IPC分类号： H01L21/00 ,  H01L29/82

    CPC分类号： B81C1/00968

    摘要： Methods and apparatus are presented to release stiction between suspended structures and the underlying surface in freestanding MEMS structures. A nanosecond rise time stress wave is launched on the backside of the Si substrate by impinging a 2.5 ns-duration Nd:YAG laser pulse onto a 3 mm-dia area. The compressive stress wave propagates through the Si substrate and arrives at the site of several stiction-failed cantilevers on the front Si surface. The compressive stress wave propagates through the cantilevered structures and is reflected into a tensile wave from their free surfaces. The returning tensile wave pries off the interface, releasing the cantilevers.

    摘要翻译： 提出了方法和装置，以释放独立MEMS结构中的悬挂结构和底层表面之间的静摩擦力。 在Si衬底的背面通过在3mm直径区域上照射2.5ns持续时间的Nd：YAG激光脉冲来发射纳秒上升时间应力波。 压缩应力波传播通过Si衬底并到达前Si表面上几个不稳定悬臂的位置。 压缩应力波传播通过悬臂结构，并从其自由表面反射成拉伸波。 返回的拉伸波从界面上撬开，释放悬臂。

    Processing quality-of-service (QoS) information of memory transactions
    15.
    发明授权
    Processing quality-of-service (QoS) information of memory transactions 有权
    处理内存事务的服务质量（QoS）信息

    公开(公告)号：US08607022B2

    公开(公告)日：2013-12-10

    申请号：US12971902

    申请日：2010-12-17

    申请人： Deniz Balkan ,  Gurjeet S. Saund ,  Vijay Gupta

    发明人： Deniz Balkan ,  Gurjeet S. Saund ,  Vijay Gupta

    IPC分类号： G06F12/00

    CPC分类号： G06F13/1668

    摘要： Systems and methods for processing quality-of-service (QoS) information of memory transactions are described. In an embodiment, a method comprises receiving identification information and quality-of-service information corresponding to a first or original memory transaction transmitted from a hardware subsystem to a memory, receiving a given memory transaction from a processor complex that does not support quality-of-service encoding, determining whether the given memory transaction matches the original memory transaction, and appending the stored quality-of-service information to the given memory transaction in response to the given memory transaction matching the original memory transaction. In some embodiments, a system may be implemented as a system-on-a-chip (SoC). Devices suitable for using these systems include, for example, desktop and laptop computers, tablets, network appliances, mobile phones, personal digital assistants, e-book readers, televisions, and game consoles.

    摘要翻译： 描述了用于处理存储器事务的服务质量（QoS）信息的系统和方法。 在一个实施例中，一种方法包括接收与从硬件子系统发送到存储器的第一或原始存储器事务对应的标识信息和服务质量信息，从不支持质量的处理器复合体接收给定的存储器事务 - 服务编码，确定给定的存储器事务是否与原始存储器事务相匹配，以及响应于与原始存储器事务匹配的给定存储器事务，将存储的服务质量信息附加到给定存储器事务。 在一些实施例中，系统可以被实现为片上系统（SoC）。 适用于这些系统的设备包括例如台式和膝上型计算机，平板电脑，网络设备，移动电话，个人数字助理，电子书阅读器，电视机和游戏机。

    Hardware Dynamic Cache Power Management
    16.
    发明申请
    Hardware Dynamic Cache Power Management 有权
    硬件动态高速缓存电源管理

    公开(公告)号：US20120084589A1

    公开(公告)日：2012-04-05

    申请号：US12894516

    申请日：2010-09-30

    申请人： Timothy J. Millet ,  Erik P. Machnicki ,  Deniz Balkan ,  Vijay Gupta

    发明人： Timothy J. Millet ,  Erik P. Machnicki ,  Deniz Balkan ,  Vijay Gupta

    IPC分类号： G06F1/32

    CPC分类号： G06F1/3203 ,  G06F1/3275 ,  G06F1/3287 ,  G06F12/0802 ,  G06F2212/1028 ,  Y02D10/13 ,  Y02D10/14 ,  Y02D10/171 ,  Y02D50/20

    摘要： In an embodiment, a control circuit is configured to transmit operations to a circuit block that is being powered up after being powered down, to reinitialize the circuit block for operation. The operations may be stored in a memory (e.g. a set of registers) to which the control circuit is coupled. In an embodiment, the control circuit may also be configured to transmit other operations from the memory to the circuit block prior to the circuit block being powered down. Accordingly, the circuit block may be powered up or powered down even during times that the processors in the system are powered down (and thus software is not executable at the time), without waking the processors for the power up/power down event. In an embodiment, the circuit block may be a cache coupled to the one or more processors.

    摘要翻译： 在一个实施例中，控制电路被配置为向断电后正在上电的电路块传送操作，以重新初始化电路块以进行操作。 操作可以存储在控制电路耦合到的存储器（例如一组寄存器）中。 在一个实施例中，控制电路还可以被配置为在电路块断电之前将其他操作从存储器传送到电路块。 因此，即使在系统中的处理器断电（并且因此软件不可执行的时候），即使在唤醒处理器以进行上电/断电事件的时间内，电路块也可以上电或掉电。 在一个实施例中，电路块可以是耦合到一个或多个处理器的高速缓存器。

    Glass-modified stress waves for separation of ultra thin films and nanoelectronics device fabrication
    18.
    发明授权
    Glass-modified stress waves for separation of ultra thin films and nanoelectronics device fabrication 有权
    用于分离超薄膜和纳米电子器件制造的玻璃修饰应力波

    公开(公告)号：US07487684B2

    公开(公告)日：2009-02-10

    申请号：US11504981

    申请日：2006-08-15

    申请人： Vijay Gupta ,  Vassili A Kireev

    发明人： Vijay Gupta ,  Vassili A Kireev

    IPC分类号： G01L1/24

    CPC分类号： G01N19/04 ,  C03C17/34 ,  C03C23/0025 ,  C03C2218/32 ,  C23C14/0005 ,  G01N2033/0096 ,  G01N2203/001 ,  G01N2203/0055 ,  G01N2203/0282

    摘要： A device for generating a tensile force between a substrate and a coating, wherein the substrate has a thickness defined by a first side and a second side in a first axis, and the coating is applied to the first side of the substrate such that the coating and substrate are axially spaced along the first axis in intimate facing contact with each other to form a coating/substrate interface. The apparatus has a glass element disposed on the second side of the substrate and axially spaced along the first axis. The glass element is configured to propagate a stress wave to the coating/substrate interface to generate a tensile force between the substrate and the coating.

    摘要翻译： 一种用于在基板和涂层之间产生张力的装置，其中所述基板具有由第一轴线的第一侧和第二侧限定的厚度，并且将所述涂层施加到所述基板的第一侧，使得所述涂层 并且衬底沿着第一轴线轴向间隔开，彼此紧密地面对接触以形成涂层/衬底界面。 该装置具有设置在基板的第二侧上的玻璃元件并且沿第一轴线轴向间隔开。 玻璃元件构造成将应力波传播到涂层/基底界面以在基底和涂层之间产生张力。