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    Two stage digital-to-analog converter
    11.
    发明授权
    Two stage digital-to-analog converter 有权

    公开(公告)号：US10128865B1

    公开(公告)日：2018-11-13

    申请号：US15658745

    申请日：2017-07-25

    Applicant: MACRONIX INTERNATIONAL CO., LTD.

    Inventor： Yih-Shan Yang

    IPC: H03M1/66

    Abstract: An N bit digital-to-analog converter DAC is based on a first stage including a first set of resistors corresponding to higher order bits of the digital input, and a second stage including a second set of resistors corresponding to lower order bits of the digital input. A plurality of pass transistors is arrange to connect a first subset of the first set of resistors in the first stage selected in response to a digital input to a second subset of the second set of resistors in the second stage selected in response to the digital input. A means for reducing variations in a sum of on-resistances RON of the pass transistors in the plurality of pass transistors selected in response to a digital input is provided, resulting in more uniform steps in output voltage of the DAC over a wider range.

    LOW DROPOUT REGULATING DEVICE AND OPERATING METHOD THEREOF
    12.
    发明申请
    LOW DROPOUT REGULATING DEVICE AND OPERATING METHOD THEREOF 审中-公开

    公开(公告)号：US20180259987A1

    公开(公告)日：2018-09-13

    申请号：US15454056

    申请日：2017-03-09

    Applicant: MACRONIX INTERNATIONAL CO., LTD.

    Inventor： Yih-Shan Yang

    IPC: G05F1/46 ,  G05F1/575

    CPC classification number: G05F1/468 ,  G05F1/575

    Abstract: A low dropout (LDO) regulating device includes a regulator and a pre-charger. The regulator is configured to adjust an output voltage provided to an output node in accordance with a voltage difference between a first reference voltage and a feedback voltage on a feedback node, wherein the feedback node is coupled to the output node. The pre-charger is electrically connected to the regulator, and is electrically connected to the feedback node for charge sharing.

    Push-pull output driver and operational amplifier using same
    13.
    发明授权
    Push-pull output driver and operational amplifier using same 有权

    公开(公告)号：US11070181B2

    公开(公告)日：2021-07-20

    申请号：US16432536

    申请日：2019-06-05

    Applicant: MACRONIX INTERNATIONAL CO., LTD.

    Inventor： Yih-Shan Yang

    IPC: H03F3/26 ,  H03F3/45 ,  H03K3/356 ,  H03K3/26

    Abstract: A voltage driver circuit for an output stage of an operational amplifier, or other circuits, includes a level shifter and an output driver including a source follower and a common source amplifier in a push-pull configuration. The level shifter generates a node voltage as a function of an input voltage on the input node. The output driver including a first transistor having a control terminal receiving the node voltage, and connected between a supply voltage and an output node, and a second transistor having a control terminal receiving the input voltage from the input node, and connected between the output node and a reference voltage, wherein the first and second transistors have a common conductivity type.

    Temperature compensation for unselected memory cells and string select switches in NAND flash memory
    14.
    发明授权
    Temperature compensation for unselected memory cells and string select switches in NAND flash memory 有权

    公开(公告)号：US10515707B2

    公开(公告)日：2019-12-24

    申请号：US15935516

    申请日：2018-03-26

    Applicant: MACRONIX INTERNATIONAL CO., LTD.

    Inventor： Yih-Shan Yang ,  Shin-Jang Shen

    IPC: G11C11/00 ,  G11C16/34 ,  G11C16/04 ,  G11C16/08 ,  G11C16/10 ,  G11C16/24 ,  G11C16/26

    Abstract: A memory device comprises a first NAND string that includes a first plurality of memory cells and a first string select switch arranged in series, the first string select switch disposed between a first bit line and a first end of the first plurality, a second NAND string that includes a second plurality of memory cells and a second string select switch arranged in series, the second string select switch disposed between a second bit line and a first end of the second plurality, word lines coupled to memory cells in the first plurality and memory cells in the second plurality, and a string select line coupled to the first and second string select switches. A method of operating such a memory device comprises applying a voltage varying in a manner complementary to absolute temperature to at least one of the word lines and the string select line.

    MEMORY PAGE BUFFER
    16.
    发明申请
    MEMORY PAGE BUFFER 有权
    内存页缓冲区

    公开(公告)号：US20140258794A1

    公开(公告)日：2014-09-11

    申请号：US14055656

    申请日：2013-10-16

    Applicant: Macronix International Co., Ltd.

    Inventor： Yih-Shan Yang ,  Shou-Nan Hung ,  Chun-Hsiung Hung ,  Yao-Jen Kuo ,  Meng-Fan Chang

    IPC: G06F11/07

    CPC classification number: G06F11/076 ,  G06F3/0619 ,  G06F3/0656 ,  G06F3/0679 ,  G06F11/0727 ,  G06F11/0787 ,  G06F11/08 ,  G11C16/08 ,  G11C16/26 ,  G11C16/3445 ,  G11C16/3459 ,  G11C29/00 ,  G11C29/022 ,  G11C29/42 ,  G11C29/44 ,  G11C2216/14

    Abstract: Counting status circuits are electrically coupled to corresponding status elements. The status elements selectably store a bit status of a bit line coupled to a memory array. The bit status can indicate one of at least pass and fail. The counting status circuits are electrically coupled to each other in a sequential order. Control logic causes processing of the counting status circuits in the sequential order to determine a total of the memory elements that store the bit status. The total number of memory elements that store the bit status indicate the number of error bits or non-error bits, which can help determine whether there are too many errors to be fixed by error correction codes.

    Abstract translation: 计数状态电路电耦合到相应的状态元件。 状态元件可选地存储耦合到存储器阵列的位线的位状态。 位状态可以指示至少通过和失败。 计数状态电路按顺序相互电耦合。 控制逻辑使得按顺序处理计数状态电路以确定存储位状态的存储元件的总数。 存储位状态的存储元件的总数表示错误位数或非错误位的数量，这可以帮助确定错误纠正码是否存在太多的错误。

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