Buffer circuit
    11.
    发明授权
    Buffer circuit 有权
    缓冲电路

    公开(公告)号:US06317378B1

    公开(公告)日:2001-11-13

    申请号:US09592225

    申请日:2000-06-12

    IPC分类号: G11C514

    CPC分类号: H03K19/017509 G05F3/247

    摘要: A buffer circuit serves for buffering a supply voltage of an integrated circuit. The supply voltage is present between two potential nodes. A series circuit is disposed between the two potential nodes and includes at least two buffer capacitors between which a third potential node is disposed. The third potential node is connected to an additional circuit which influences the potential of the third potential node in such a way that it does not exceed an upper and/or lower limit value when a leakage current occurs through one of the capacitors. The advantage of the buffer circuit is that when there is a defect in just one of the buffer capacitors, the other capacitor is prevented from being destroyed.

    摘要翻译: 缓冲电路用于缓冲集成电路的电源电压。 电源电压存在于两个电位节点之间。 串联电路设置在两个电位节点之间,并且包括至少两个缓冲电容器,第三电位节点之间设置有缓冲电容器。 第三电位节点连接到附加电路,该附加电路以这样的方式影响第三电位节点的电位,使得当通过电容器之一发生漏电流时,其不超过上限值和/或下限值。 缓冲电路的优点在于,当仅缓冲电容器中的一个存在缺陷时,防止另一电容器被破坏。

    Integrated semiconductor chip with modular dummy structures
    12.
    发明授权
    Integrated semiconductor chip with modular dummy structures 有权
    具有模块化虚拟结构的集成半导体芯片

    公开(公告)号:US06307263B1

    公开(公告)日:2001-10-23

    申请号:US09363263

    申请日:1999-07-29

    IPC分类号: H01L2348

    摘要: For an integrated semiconductor chip to operate reliably, it is necessary to homogenize a substrate potential as far as possible in all regions of the chip. In order to improve the substrate contact-connections on the chip, modular dummy structures are configured in such a way that, in addition to homogenizing the areal occupancy of the chip, they form extensive electrically conductive contact between the substrate and metal interconnects of a metallization plane of the chip. This achieves homogenization of the substrate potential and improvement of the wave guiding properties of wiring planes lying above the dummy structures without an additional process step or an additional chip area being required for this purpose.

    摘要翻译: 为了可靠地工作的集成半导体芯片,有必要在芯片的所有区域尽可能地均匀化衬底电位。 为了改善芯片上的衬底接触连接,模块化虚拟结构被配置成使得除了均匀化芯片的面积之外,它们在衬底和金属化的金属互连之间形成广泛的导电接触 平面的芯片。 这实现了衬底电位的均匀化,并且提高了位于虚拟结构之上的布线平面的波导性能,而没有额外的工艺步骤或为此目的需要额外的芯片面积。

    Device with precharge/homogenize circuit
    13.
    发明授权
    Device with precharge/homogenize circuit 有权
    具有预充电/均质电路的装置

    公开(公告)号:US07948806B2

    公开(公告)日:2011-05-24

    申请号:US12122273

    申请日:2008-05-16

    IPC分类号: G11C11/34

    摘要: A device with a precharge/homogenize circuit. One embodiment provides at least one switching element is acting as a homogenizer, and at least one switching element is acting as a precharger. The diffusion region of the switching element acting as a homogenizer is separated from the diffusion region of the switching element acting as a precharger.

    摘要翻译: 具有预充电/均质电路的器件。 一个实施例提供至少一个开关元件用作均化器,并且至少一个开关元件充当预充电器。 作为均化器的开关元件的扩散区域与作为预充电器的开关元件的扩散区域分离。

    Integrated circuit and method of operating such a circuit
    14.
    发明授权
    Integrated circuit and method of operating such a circuit 失效
    集成电路和操作这种电路的方法

    公开(公告)号:US07548476B2

    公开(公告)日:2009-06-16

    申请号:US11566553

    申请日:2006-12-04

    IPC分类号: G11C7/02

    摘要: An integrated circuit includes a bit line pair having two bit lines, a sense amplifier having at least one transistor, the sense amplifier amplifying a charge difference between the bit lines of the bit line pair; and a control unit connected to a substrate terminal of the at least one transistor, the control unit applying a substrate potential dependent on an operating state of the integrated circuit to the substrate of the at least one transistor.

    摘要翻译: 集成电路包括具有两个位线的位线对,具有至少一个晶体管的读出放大器,所述读出放大器放大位线对的位线之间的电荷差; 以及连接到所述至少一个晶体管的衬底端子的控制单元,所述控制单元将所述集成电路的操作状态的衬底电位施加到所述至少一个晶体管的衬底。

    MEMORY WITH ALTERABLE COLUMN SELECTION TIME
    15.
    发明申请
    MEMORY WITH ALTERABLE COLUMN SELECTION TIME 审中-公开
    具有可选列选择时间的记忆

    公开(公告)号:US20080002515A1

    公开(公告)日:2008-01-03

    申请号:US11768160

    申请日:2007-06-25

    IPC分类号: G11C8/00 G11C7/00

    摘要: A memory contains memory cells and is clock-controlled on the basis of a basic clock signal at the frequency fc, wherein a chosen memory cell is accessed by closing an addressed column selection switch. The memory has a pulse generator to produce a column selection pulse which closes the addressed column selection switch, wherein the pulse generator contains a first pulse timer for prescribing a fixed time Tf for the length Txof the column selection pulse and a second pulse timer for prescribing a frequency-dependent time Tv, which is proportional to the clock signal period Tc=1/fc, for the length of the column selection pulse.

    摘要翻译: 存储器包含存储器单元,并且基于频率为f C c C c的基本时钟信号进行时钟控制,其中通过关闭寻址列选择开关来访问所选存储单元。 存储器具有脉冲发生器以产生列选择脉冲,其闭合寻址列选择开关,其中脉冲发生器包含第一脉冲定时器,用于为长度T SUB定义固定时间T < x 和第二脉冲计时器,用于规定与时钟信号周期T T = 0成正比的频率相关时间T < 对于列选择脉冲的长度,1 / f C

    INTEGRATED CIRCUIT AND METHOD OF OPERATING SUCH A CIRCUIT
    16.
    发明申请
    INTEGRATED CIRCUIT AND METHOD OF OPERATING SUCH A CIRCUIT 失效
    集成电路和操作这种电路的方法

    公开(公告)号:US20070153601A1

    公开(公告)日:2007-07-05

    申请号:US11566553

    申请日:2006-12-04

    IPC分类号: G11C7/02

    摘要: An integrated circuit comprises a bit line pair having two bit lines, a sense amplifier having at least one transistor, the sense amplifier amplifying a charge difference between the bit lines of the bit line pair; and a control unit connected to a substrate terminal of the at least one transistor, the control unit applying a substrate potential dependent on an operating state of the integrated circuit to the substrate of the at least one transistor.

    摘要翻译: 集成电路包括具有两个位线的位线对,具有至少一个晶体管的读出放大器,所述读出放大器放大位线对的位线之间的电荷差; 以及连接到所述至少一个晶体管的衬底端子的控制单元,所述控制单元将所述集成电路的操作状态的衬底电位施加到所述至少一个晶体管的衬底。

    Method and circuit arrangement for reading out and for storing binary memory cell signals
    17.
    发明授权
    Method and circuit arrangement for reading out and for storing binary memory cell signals 失效
    用于读出和存储二进制存储单元信号的方法和电路装置

    公开(公告)号:US06721219B2

    公开(公告)日:2004-04-13

    申请号:US10150340

    申请日:2002-05-17

    IPC分类号: G11C700

    CPC分类号: G11C7/065 G11C2207/002

    摘要: The invention provides a method in which a binary memory cell signal from a; least one memory cell is applied to at least one bit line pair (201t, 201b), the binary memory cell signal from the memory tell is switched through via the bit line pair (201t, 201b) to at least one sense amplifier (202), a binary output signal of the sense amplifier (202) is switched through to a local data line pair (205) as a binary intermediate signal, the binary intermediate signal on the local data line pair (205) is switched through to at least one main data line pair (208) by means of a main data line switching transistor pair (209) in a manner dependent on a row control signal fed via a row control line (210), the main data line switching transistor pair (209) being arranged in the through-plating regions formed between the memory cell arrays.

    摘要翻译: 本发明提供一种方法,其中来自a的二进制存储单元信号, 至少一个存储单元被施加到至少一个位线对(201t,201b),来自存储器的二进制存储器单元信号经由位线对(201t,201b)被切换到至少一个读出放大器(202) 将读出放大器(202)的二进制输出信号作为二进制中间信号切换到本地数据线对(205),将本地数据线对(205)上的二进制中间信号切换到至少一个 主数据线开关晶体管对(209)以主数据线切换晶体管对(209)的方式依赖于通过行控制线(210)馈送的行控制信号,主数据线开关晶体管对(209) 布置在形成在存储单元阵列之间的贯通电镀区域中。

    Electromechanical motor
    20.
    发明授权
    Electromechanical motor 失效
    机电电机

    公开(公告)号:US07759841B2

    公开(公告)日:2010-07-20

    申请号:US12416683

    申请日:2009-04-01

    IPC分类号: H01L41/08

    CPC分类号: H02N2/04

    摘要: The invention relates to an electromechanical motor having a stator that has a drive unit and a frame component in which the drive unit is held, and a sliding element that is constructed such that, actuated by the drive unit, it performs a movement with respect to the stator in a direction of translation, wherein the drive unit has at least one electromechanical drive element that extends in the direction of translation and a power transmission element that is constructed so as to transmit a movement of the drive element to the sliding element. The sliding element has a supporting component and a drive rail, the drive rail extending in the direction of translation and interacting with the power transmission element and the drive rail being held at both its end faces in the supporting component, and between the supporting component and the frame component of the stator, there is a bearing for supporting the sliding element in the frame component.

    摘要翻译: 本发明涉及具有定子的机电马达,该定子具有驱动单元和保持驱动单元的框架部件,以及构造成由驱动单元致动的滑动元件,其相对于 所述定子在平移方向上,其中所述驱动单元具有至少一个在平移方向上延伸的机电驱动元件,以及构造成将所述驱动元件的运动传递到所述滑动元件的动力传递元件。 滑动元件具有支撑部件和驱动轨道,驱动轨道在平移方向上延伸并且与动力传递元件相互作用,并且驱动轨道保持在支撑部件的两端面以及支撑部件和 定子的框架部件存在用于将滑动元件支撑在框架部件中的轴承。