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11.发明授权Polishing solution supply system, method of supplying polishing solution, apparatus for and method of polishing semiconductor substrate and method of manufacturing semiconductor device 失效抛光溶液供给系统，抛光溶液的供给方法，半导体基板的研磨装置及其研磨方法以及半导体装置的制造方法公开(公告)号：US07258598B2
公开(公告)日：2007-08-21
申请号：US09934474
申请日：2001-08-23
申请人： Masanobu Iwasaki , Yoshio Hayashide
发明人： Masanobu Iwasaki , Yoshio Hayashide
CPC分类号： B24B37/04 , B24B57/02 , B24C11/005
摘要： A first supply unit sprays and supplies abrasive slurry containing abrasive grains into a mixing unit. A second supply unit sprays and supplies additive into the mixing unit. A third supply unit sprays and supplies pure water into the mixing unit. The mixing unit mixes the mist of abrasive slurry, the mist of additive and the mist of pure water to prepare polishing solution, and supplies the polishing solution onto the major surface of a polishing stage.
摘要翻译： 第一供应单元将含有磨粒的研磨浆料喷射并供应到混合单元中。 第二供应单元喷雾并将混合单元中的添加剂供应。 第三供应单元喷雾并将纯水供应到混合单元中。 混合单元混合研磨浆料雾，添加剂雾和纯水雾以制备抛光溶液，并将抛光溶液供应到抛光台的主表面上。
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公开(公告)号：US07465216B2
公开(公告)日：2008-12-16
申请号：US11878028
申请日：2007-07-20
申请人： Masanobu Iwasaki , Yoshio Hayashide
发明人： Masanobu Iwasaki , Yoshio Hayashide
CPC分类号： B24B37/04 , B24B57/02 , B24C11/005
摘要： A first supply unit sprays and supplies abrasive slurry containing abrasive grains into a mixing unit. A second supply unit sprays and supplies additive into the mixing unit. A third supply unit sprays and supplies pure water into the mixing unit. The mixing unit mixes the mist of abrasive slurry, the mist of additive and the mist of pure water to prepare polishing solution, and supplies the polishing solution onto the major surface of a polishing stage.
摘要翻译： 第一供应单元将含有磨粒的研磨浆料喷射并供应到混合单元中。 第二供应单元喷雾并将混合单元中的添加剂供应。 第三供应单元喷雾并将纯水供应到混合单元中。 混合单元混合研磨浆料雾，添加剂雾和纯水雾以制备抛光溶液，并将抛光溶液供应到抛光台的主表面上。
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13.发明授权Semiconductor device having an improved interlayer conductor connections and a manufacturing method thereof 失效具有改进的层间导体连接的半导体器件及其制造方法公开(公告)号：US06727170B2
公开(公告)日：2004-04-27
申请号：US09903760
申请日：2001-07-13
IPC分类号： H01L2100
CPC分类号： H01L23/5226 , H01L21/76819 , H01L21/76838 , H01L23/5329 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： There is described a semiconductor device which prevents a short circuit between a wiring layer formed in interlayer insulating films and vertical conductor plugs formed in the vicinity of the wiring layer, and a method of manufacturing the semiconductor device. The semiconductor device includes a first interlayer insulating film smoothly formed on a semiconductor substrate, conductor plugs which are formed by filling openings formed in the first interlayer insulating film so as to be level with the surface of the first interlayer insulating film, a second interlayer insulating film formed on the surface of the first interlayer insulating film and of the conductor plugs, a wiring pattern formed on the second interlayer insulating film, a third interlayer insulating film formed on the surface of the second interlayer insulating film so as to cover the wiring pattern, and an interconnect conductor formed so as to be electrically connected to the conductor plugs by filling the openings penetrating the second and third interlayer insulating films.
摘要翻译： 描述了防止在层间绝缘膜中形成的布线层和形成在布线层附近的垂直导体插塞之间的短路的半导体器件，以及半导体器件的制造方法。 半导体器件包括在半导体衬底上平滑地形成的第一层间绝缘膜，通过填充形成在第一层间绝缘膜中的开口以与第一层间绝缘膜的表面平齐而形成的导体插塞，第二层间绝缘 形成在第一层间绝缘膜和导体插塞的表面上的膜，形成在第二层间绝缘膜上的布线图案，形成在第二层间绝缘膜的表面上以覆盖布线图案的第三层间绝缘膜 以及互连导体，其通过填充贯穿第二和第三层间绝缘膜的开口而形成为与导体插塞电连接。
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公开(公告)号：US06568996B2
公开(公告)日：2003-05-27
申请号：US09837323
申请日：2001-04-19
申请人： Toshio Kobayashi , Toshiyuki Toyoshima , Suguru Nagae , Masanobu Iwasaki , Kouichirou Tsutahara , Shin Hasegawa
发明人： Toshio Kobayashi , Toshiyuki Toyoshima , Suguru Nagae , Masanobu Iwasaki , Kouichirou Tsutahara , Shin Hasegawa
IPC分类号： C09K314
CPC分类号： H01L21/3212 , B24B37/044 , C09G1/02 , C09K3/1463 , H01L21/31053
摘要： The object of the present invention is to provide a polishing agent for processing semiconductor, which can control coagulation and sedimentation and has stable and re-productive polishing properties under a proper dispersing condition to prevent generation of polishing flaw. The polishing agent for processing semiconductor comprises a compound having glucose structure, polishing particles and water.
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公开(公告)号：US07465221B2
公开(公告)日：2008-12-16
申请号：US11878030
申请日：2007-07-20
申请人： Masanobu Iwasaki , Yoshio Hayashide
发明人： Masanobu Iwasaki , Yoshio Hayashide
CPC分类号： B24B37/04 , B24B57/02 , B24C11/005
摘要： A first supply unit sprays and supplies abrasive slurry containing abrasive grains into a mixing unit. A second supply unit sprays and supplies additive into the mixing unit. A third supply unit sprays and supplies pure water into the mixing unit. The mixing unit mixes the mist of abrasive slurry, the mist of additive and the mist of pure water to prepare polishing solution, and supplies the polishing solution onto the major surface of a polishing stage.
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16.发明授权Method of manufacturing a semiconductor device having a monitor pattern, and a semiconductor device manufactured thereby 失效具有监视器图案的半导体器件的制造方法以及由此制造的半导体器件公开(公告)号：US06303944B1
公开(公告)日：2001-10-16
申请号：US09122765
申请日：1998-07-27
IPC分类号： H01L2358
CPC分类号： H01L21/31053 , H01L22/12 , H01L2924/0002 , H01L2924/00
摘要： The semiconductor device includes a semiconductor wafer which is partitioned into chip regions by scribe line area. A device pattern is formed in the device forming region included in the chip region. A monitor pattern is formed from the same material as that of the device patterns in the chip region simultaneously with the device pattern. An interlayer insulating film is formed in the chip region so as to cover the device pattern and the monitor pattern. The monitor pattern is used to measure the thickness of the interlayer insulating film.
摘要翻译： 半导体器件包括通过划线区域划分成芯片区域的半导体晶片。 在包括在芯片区域中的器件形成区域中形成器件图案。 与芯片区域中的器件图案相同的材料与器件图案同时形成监视器图案。 在芯片区域中形成层间绝缘膜，以覆盖器件图案和监视图案。 监视器图案用于测量层间绝缘膜的厚度。
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17.发明授权Semiconductor device having an improved interlayer conductor connections and a manufacturing method thereof 失效具有改进的层间导体连接的半导体器件及其制造方法公开(公告)号：US06278187B1
公开(公告)日：2001-08-21
申请号：US09122650
申请日：1998-07-27
IPC分类号： H01L2348
CPC分类号： H01L23/5329 , H01L21/76819 , H01L21/76838 , H01L23/5226 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： There is described a semiconductor device which prevents a short circuit between a wiring layer formed in interlayer insulating films and vertical conductor plugs formed in the vicinity of the wiring layer, and a method of manufacturing the semiconductor device. The semiconductor device includes a first interlayer insulating film smoothly formed on a semiconductor substrate, conductor plugs which are formed by filling openings formed in the first interlayer insulating film so as to be level with the surface of the first interlayer insulating film, a second interlayer insulating film formed on the surface of the first interlayer insulating film and of the conductor plugs, a wiring pattern formed on the second interlayer insulating film, a third interlayer insulating film formed on the surface of the second interlayer insulating film so as to cover the wiring pattern, and an interconnect conductor formed so as to be electrically connected to the conductor plugs by filling the openings penetrating the second and third interlayer insulating films.
摘要翻译： 描述了防止在层间绝缘膜中形成的布线层和形成在布线层附近的垂直导体插塞之间的短路的半导体器件，以及半导体器件的制造方法。 半导体器件包括在半导体衬底上平滑地形成的第一层间绝缘膜，通过将形成在第一层间绝缘膜中的开口填充以与第一层间绝缘膜的表面平齐而形成的导体插塞，第二层间绝缘膜 形成在第一层间绝缘膜和导体插塞的表面上的膜，形成在第二层间绝缘膜上的布线图案，形成在第二层间绝缘膜的表面上以覆盖布线图案的第三层间绝缘膜 以及互连导体，其通过填充贯穿第二和第三层间绝缘膜的开口而形成为与导体插塞电连接。
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