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公开(公告)号:US11934689B2
公开(公告)日:2024-03-19
申请号:US17984929
申请日:2022-11-10
Applicant: Micron Technology, Inc.
Inventor: Michael G. Miller , Ashutosh Malshe , Gianni Stephen Alsasua , Renato Padilla, Jr. , Vamsi Pavan Rayaprolu , Kishore Kumar Muchherla , Harish Reddy Singidi
CPC classification number: G06F3/0655 , G06F3/0604 , G06F3/0679 , G06F11/0727 , G06F11/076 , G06F11/0793 , G11C16/26 , G11C16/3427 , G11C16/0483
Abstract: A processing device detects a read operation at a memory device that is directed at a word line group from among multiple word line groups of the memory device. The processing device increments a read counter associated with the word line group based on the read operation being directed at the word line group. The processing device determines the read counter exceeds a read-disturb threshold and performs read-disturb handling on the word line group in response to determining the read counter exceeds the read-disturb threshold.
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公开(公告)号:US11544008B2
公开(公告)日:2023-01-03
申请号:US17232866
申请日:2021-04-16
Applicant: Micron Technology, Inc.
Inventor: Gianni Stephen Alsasua , Karl D. Schuh , Ashutosh Malshe , Kishore Kumar Muchherla , Vamsi Pavan Rayaprolu , Sampath Ratnam , Harish Reddy Singidi , Renato Padilla, Jr.
IPC: G11C16/04 , G06F3/06 , G06F12/1009 , G11C16/34 , G11C16/26
Abstract: A memory device may receive a read request describing a logical address at the memory device. The memory device may obtain a table entry associated with the logical address. The table entry comprises a physical address corresponding to the logical address and a write temperature data indicating a write temperature for the logical address. The memory device may determine a corrected threshold voltage for reading the physical address based at least in part on the write temperature data and read the physical address using the corrected threshold voltage.
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公开(公告)号:US11507300B2
公开(公告)日:2022-11-22
申请号:US17080567
申请日:2020-10-26
Applicant: Micron Technology, Inc.
Inventor: Michael G. Miller , Ashutosh Malshe , Gianni Stephen Alsasua , Renato Padilla, Jr. , Vamsi Pavan Rayaprolu , Kishore Kumar Muchherla , Harish Reddy Singidi
Abstract: A processing device detects a read operation at a memory device that is directed at a word line group from among multiple word line groups of the memory device. The processing device increments a read counter associated with the word line group based on the read operation being directed at the word line group. The processing device determines the read counter exceeds a read-disturb threshold and performs read-disturb handling on the word line group in response to determining the read counter exceeds the read-disturb threshold.
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公开(公告)号:US10796745B2
公开(公告)日:2020-10-06
申请号:US16855579
申请日:2020-04-22
Applicant: Micron Technology, Inc.
Inventor: Gianni Stephen Alsasua , Harish Reddy Singidi , Kishore Kumar Muchherla , Sampath Ratnam , Ashutosh Malshe , Vamsi Pavan Rayaprolu , Renato Padilla, Jr.
IPC: G11C7/00 , G11C11/406 , G06F13/16
Abstract: Devices and techniques for temperature informed memory refresh are described herein. A temperature counter can be updated in response to a memory device write performed under an extreme temperature. Here, the write is performed on a memory device element in the memory device. The memory device element can be sorted above other memory device elements in the memory device based on the temperature counter. Once sorted to the top of these memory device elements, a refresh can be performed the memory device element.
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公开(公告)号:US11887651B2
公开(公告)日:2024-01-30
申请号:US17745262
申请日:2022-05-16
Applicant: Micron Technology, Inc.
Inventor: Gianni Stephen Alsasua , Harish Reddy Singidi , Kishore Kumar Muchherla , Sampath Ratnam , Ashutosh Malshe , Vamsi Pavan Rayaprolu , Renato Padilla, Jr.
IPC: G11C11/406 , G06F13/16 , G11C7/04
CPC classification number: G11C11/40626 , G06F13/1636 , G11C7/04 , G11C11/40615 , G11C2211/4061
Abstract: Devices and techniques for temperature informed memory refresh are described herein. A temperature counter can be updated in response to a memory device write performed under an extreme temperature. Here, the write is performed on a memory device element in the memory device. The memory device element can be sorted above other memory device elements in the memory device based on the temperature counter. Once sorted to the top of these memory device elements, a refresh can be performed the memory device element.
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公开(公告)号:US11335394B2
公开(公告)日:2022-05-17
申请号:US17238846
申请日:2021-04-23
Applicant: Micron Technology, Inc.
Inventor: Gianni Stephen Alsasua , Harish Reddy Singidi , Kishore Kumar Muchherla , Sampath Ratnam , Ashutosh Malshe , Vamsi Pavan Rayaprolu , Renato Padilla, Jr.
IPC: G11C7/00 , G11C11/406 , G06F13/16 , G11C7/04
Abstract: Devices and techniques for temperature informed memory refresh are described herein. A temperature counter can be updated in response to a memory device write performed under an extreme temperature. Here, the write is performed on a memory device element in the memory device. The memory device element can be sorted above other memory device elements in the memory device based on the temperature counter. Once sorted to the top of these memory device elements, a refresh can be performed the memory device element.
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公开(公告)号:US11023177B2
公开(公告)日:2021-06-01
申请号:US16909503
申请日:2020-06-23
Applicant: Micron Technology, Inc.
Inventor: Gianni Stephen Alsasua , Karl D. Schuh , Ashutosh Malshe , Kishore Kumar Muchherla , Vamsi Pavan Rayaprolu , Sampath Ratnam , Harish Reddy Singidi , Renato Padilla, Jr.
IPC: G11C16/04 , G06F3/06 , G06F12/1009 , G11C16/34 , G11C16/26
Abstract: A memory device may receive a read request describing a logical address at the memory device. The memory device may obtain a table entry associated with the logical address. The table entry comprises a physical address corresponding to the logical address and a write temperature data indicating a write temperature for the logical address. The memory device may determine a corrected threshold voltage for reading the physical address based at least in part on the write temperature data and read the physical address using the corrected threshold voltage.
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18.
公开(公告)号:US10658047B1
公开(公告)日:2020-05-19
申请号:US16177193
申请日:2018-10-31
Applicant: Micron Technology, Inc.
Inventor: Harish Singidi , Kishore Muchherla , Ashutosh Malshe , Vamsi Rayaprolu , Sampath Ratnam , Renato Padilla, Jr. , Michael Miller
Abstract: A memory sub-system can be determined to be operating within a target operating characteristic based on a threshold success rate associated with error control operations using a particular parameter. Upon determining that the memory sub-system is operating within the target operating characteristic, a sticky read mode is entered by performing subsequent read operations using the particular parameter. It is determined that additional error control operations are triggered for at least a first threshold number of read operations using the particular parameter during the sticky read mode. Upon determining that the additional error control operations are triggered for at least the first threshold number of read operations using the particular parameter during the sticky read mode, the sticky read mode is exited by performing further read operations using a default parameter associated with the memory sub-system.
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