Assemblies having vertically-stacked conductive structures

    公开(公告)号:US10170493B1

    公开(公告)日:2019-01-01

    申请号:US15848398

    申请日:2017-12-20

    Abstract: Some embodiments include a method in which an assembly is formed to have voids within a stack, and to have slits adjacent the voids. Peripheral boundaries of the voids have proximal regions near the slits and distal regions adjacent the proximal regions. A material is deposited within the voids under conditions which cause the material to form to a greater thickness along the distal regions than along the proximal regions. Some embodiments include an assembly having a stack of alternating first and second levels. The second levels include conductive material. Panel structures extend through the stack. The conductive material within the second levels has outer edges with proximal regions near the panel structures and distal regions adjacent the proximal regions. Interface material is along the outer edges of the conductive material and has a different composition along the proximal regions than along the distal regions.

    Memory Circuitry And Method Used In Forming Memory Circuitry

    公开(公告)号:US20230389313A1

    公开(公告)日:2023-11-30

    申请号:US17869586

    申请日:2022-07-20

    CPC classification number: H01L27/11582 H01L27/11556

    Abstract: A memory array comprising strings of memory cells comprises laterally-spaced memory blocks individually comprising a first vertical stack comprising vertically-alternating insulative tiers and conductive tiers. Strings of memory cells comprise channel-material strings that extend through the insulative tiers and the conductive tiers. A second vertical stack is aside the first vertical stack. The second vertical stack comprises insulative tiers collectively comprising at least two different compositions relative individual of the insulative tiers. Individual of the at least two different compositions comprise silicon nitride. One of the individual different compositions comprise carbon-doped silicon nitride having at least 0.5 atomic percent more carbon than atomic percent of carbon, if any, in the silicon nitride of another of the individual different compositions. Other embodiments, including method, are disclosed.

    Transistor And Memory Circuitry Comprising Strings Of Memory Cells

    公开(公告)号:US20230016742A1

    公开(公告)日:2023-01-19

    申请号:US17375602

    申请日:2021-07-14

    Abstract: Memory circuitry comprising strings of memory cells comprises a vertical stack comprising alternating insulative tiers and conductive tiers. Channel-material strings extend through the insulative tiers and the conductive tiers. Charge-passage material is in the conductive tiers laterally-outward of the channel-material strings. Storage material is in the conductive tiers laterally-outward of the charge-passage material. At least one of AlOq, ZrOq, and HfOq is in the conductive tiers laterally-outward of the storage material. At least one of (a) and (b) is in the conductive tiers laterally-outward of the at least one of AlOq, ZrOq, and HfOq, where, (a): MoOxNy, where each of “x” and “y” is from 0 to 4.0; and (b): MoMz, where “M” is at least one of W, a Group 7 metal, and a Group 8 metal; “z” being greater than 0 and less than 1.0. Metal material is in the conductive tiers laterally-outward of the at least one of the (a) and the (b). Memory cells are in individual of the conductive tiers. The memory cells individually comprise the channel material of individual of the channel-material strings, the storage material, the at least one of AlOq, ZrOq, and HfOq, the at least one of the (a) and the (b), and the metal material. Other embodiments are disclosed.

    Methods of Filling Openings with Conductive Material, and Assemblies Having Vertically-Stacked Conductive Structures

    公开(公告)号:US20210066332A1

    公开(公告)日:2021-03-04

    申请号:US17071980

    申请日:2020-10-15

    Abstract: Some embodiments include a method in which an assembly is formed to have voids within a stack, and to have slits adjacent the voids. Peripheral boundaries of the voids have proximal regions near the slits and distal regions adjacent the proximal regions. A material is deposited within the voids under conditions which cause the material to form to a greater thickness along the distal regions than along the proximal regions. Some embodiments include an assembly having a stack of alternating first and second levels. The second levels include conductive material. Panel structures extend through the stack. The conductive material within the second levels has outer edges with proximal regions near the panel structures and distal regions adjacent the proximal regions. Interface material is along the outer edges of the conductive material and has a different composition along the proximal regions than along the distal regions.

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