公开(公告)号：US11199995B2

公开(公告)日：2021-12-14

申请号：US16688250

申请日：2019-11-19

Applicant: Micron Technology, Inc.

Inventor： Shivasankar Gunasekaran ,  Samuel E. Bradshaw ,  Justin M. Eno ,  Ameen D. Akel

IPC: G06F3/06 ,  G06F12/0873 ,  G06F11/07

Abstract: A memory sub-system configured to be responsive to a time to live requirement for load commands from a processor. For example, a load command issued by the processor (e.g., SoC) can include, or be associated with, an optional time to live parameter. The parameter requires that the data at the memory address be available within the time specified by the time to live parameter. When the requested data is currently in the lower speed memory (e.g., NAND flash) and not available in the higher speed memory (e.g., DRAM, NVRAM), the memory subsystem can determine that the data cannot be made available with the specified time and optionally skip the operations and return an error response immediately.

公开(公告)号：US11087859B2

公开(公告)日：2021-08-10

申请号：US16853226

申请日：2020-04-20

Applicant: Micron Technology, Inc.

Inventor： Samuel E. Bradshaw ,  Justin Eno

IPC: G06F11/00 ,  G11C29/00 ,  G11C13/00 ,  G06F11/16 ,  G11C29/52

Abstract: Exemplary methods, apparatuses, and systems include determining that data in a group of memory cells of a first memory device is to be moved to a spare group of memory cells. The group of memory cells spans a first dimension and a second dimension that is orthogonal to the first dimension and the spare group of memory cells also spans the first dimension and the second dimension. The data is read from the group of memory cells along the first dimension of the group of memory cells. The data is written to the spare group of memory cells along the second dimension of the spare group of memory cells.

公开(公告)号：US11061819B2

公开(公告)日：2021-07-13

申请号：US16424424

申请日：2019-05-28

Applicant: Micron Technology, Inc.

Inventor： Ameen D. Akel ,  Samuel E. Bradshaw ,  Kenneth Marion Curewitz ,  Sean Stephen Eilert ,  Dmitri Yudanov

IPC: G06F12/00 ,  G06F12/10 ,  H04L29/08 ,  H04W84/04

Abstract: Systems, methods and apparatuses of distributed computing based on Memory as a Service are described. For example, a set of networked computing devices can each be configured to execute an application that accesses memory using a virtual memory address region. Each respective device can map the virtual memory address region to the local memory for a first period of time during which the application is being executed in the respective device, map the virtual memory address region to a local memory of a remote device in the group for a second period of time after starting the application in the respective device and before terminating the application in the respective device, and request the remote device to process data in the virtual memory address region during at least the second period of time.

公开(公告)号：US11048580B2

公开(公告)日：2021-06-29

申请号：US16796848

申请日：2020-02-20

Applicant: Micron Technology, Inc.

Inventor： Samuel E. Bradshaw ,  Justin Eno ,  Sean Stephen Eilert ,  Sai Krishna Mylavarapu

IPC: G06F11/00 ,  G06F11/10 ,  G06F3/06

Abstract: Exemplary methods, apparatuses, and systems include a memory controller receiving a user payload to be written to a memory. The memory controller determines a plurality of locations within the memory within which the user payload will be written. After detecting the destination of the user payload, the memory controller detects, within a data structure, the presence of an identifier of a first location within a user data portion of the plurality of locations. The memory controller writes the user payload to the user data portion of the plurality of locations and, in response to detecting the presence of the identifier in the data structure, writes a copy of one or more bits in the user payload written to the first location to a spare data portion of the plurality of locations.

公开(公告)号：US20210157718A1

公开(公告)日：2021-05-27

申请号：US16694345

申请日：2019-11-25

Applicant: Micron Technology, Inc.

Inventor： Dmitri Yudanov ,  Samuel E. Bradshaw

IPC: G06F12/02 ,  G06F13/16

Abstract: Reduction of page migration while maintaining benefits of migration can include operations that include scoring objects and executables of application processes of a computing device based on placement and movement of the objects and executables in memory of the device, as well as grouping the objects and executables based on the placement and movement of the objects and executables in the memory. The operations can also include controlling loading and storing, in a first type of memory of the memory, at a first plurality of pages of the memory, a first group of the objects and executables at least according to the scoring. And, the operations can include controlling loading and storing, in at least one additional type of memory of the memory, at one or more additional pluralities of pages of the memory, at least one additional group of the objects and executables at least according to the scoring.

公开(公告)号：US20210103463A1

公开(公告)日：2021-04-08

申请号：US16592537

申请日：2019-10-03

Applicant: Micron Technology, Inc.

Inventor： Dmitri Yudanov ,  Samuel E. Bradshaw

IPC: G06F9/48 ,  G06F9/38 ,  G06F11/30 ,  G06F11/34 ,  G11C11/409

Abstract: Customized root processes for groups of applications in a computing device. A computing device (e.g., a mobile device) can monitor usage of applications. The device can then store data related to the usage of the applications, and group the applications into groups according to the stored data. The device can customize and execute a root process for a group of applications according to usage common to each application in the group. The device can generate patterns of prior executions shared amongst the applications in the group based on the stored data common to each application in the group, and execute the root process of the group according to the patterns. The device can receive a request to start an application from the group from a user of the device, and start the application upon receiving the request and by using the root process of the group of applications.

公开(公告)号：US20210103446A1

公开(公告)日：2021-04-08

申请号：US16592547

申请日：2019-10-03

Applicant: Micron Technology, Inc.

Inventor： Dmitri Yudanov ,  Samuel E. Bradshaw

IPC: G06F9/4401 ,  G06F9/445 ,  G06F12/06 ,  G06N3/08 ,  G06N3/04

Abstract: In a mobile device, processes of an application can be monitored and scored for initial data distribution. Specifically, a method can include monitoring processes of an application, and scoring objects or components used by the processes to determine placement of the objects or components in memory during initiation of the application. The method can also include, during initiation of the application, loading, into a first portion of the memory, at least partially, the objects or components scored at a first level. The method can also include, during initiation of the application, loading, into a second portion of the memory, at least partially, the objects or components scored at a second level. The objects or components scored at the second level can be less critical to the application than the objects or components scored at the first level.

公开(公告)号：US20210081324A1

公开(公告)日：2021-03-18

申请号：US16573527

申请日：2019-09-17

Applicant: Micron Technology, Inc.

Inventor： Samuel E. Bradshaw ,  Justin M. Eno ,  Sean S. Eilert ,  Shivasankar Gunasekaran ,  Hongyu Wang ,  Shivam Swami

IPC: G06F12/1009 ,  G06F12/1027

Abstract: A computer system includes physical memory devices of different types that store randomly-accessible data in memory of the computer system. In one approach, access to memory in an address space is maintained by an operating system of the computer system. A virtual page is associated with a first memory type. A page table entry is generated to map a virtual address of the virtual page to a physical address in a first memory device of the first memory type. The page table entry is used by a memory management unit to store the virtual page at the physical address.

公开(公告)号：US20200382590A1

公开(公告)日：2020-12-03

申请号：US16424411

申请日：2019-05-28

Applicant: Micron Technology, Inc.

Inventor： Dmitri Yudanov ,  Ameen D. Akel ,  Samuel E. Bradshaw ,  Kenneth Marion Curewitz ,  Sean Stephen Eilert

IPC: H04L29/08 ,  G06F12/1027 ,  G06F12/1009 ,  G06F12/02

Abstract: Systems, methods and apparatuses to provide memory as a service are described. For example, a borrower device is configured to: communicate with a lender device; borrow an amount of memory from the lender device; expand memory capacity of the borrower device for applications running on the borrower device, using at least the local memory of the borrower device and the amount of memory borrowed from the lender device; and service accesses by the applications to memory via communication link between the borrower device and the lender device.

公开(公告)号：US20200379908A1

公开(公告)日：2020-12-03

申请号：US16424421

申请日：2019-05-28

Applicant: Micron Technology, Inc.

Inventor： Kenneth Marion Curewitz ,  Ameen D. Akel ,  Samuel E. Bradshaw ,  Sean Stephen Eilert ,  Dmitri Yudanov

IPC: G06F12/0837 ,  G06F12/1027 ,  G06F12/1009 ,  G06F11/14 ,  G06F9/38

Abstract: Systems, methods and apparatuses to intelligently migrate content involving borrowed memory are described. For example, after the prediction of a time period during which a network connection between computing devices having borrowed memory degrades, the computing devices can make a migration decision for content of a virtual memory address region, based at least in part on a predicted usage of content, a scheduled operation, a predicted operation, a battery level, etc. The migration decision can be made based on a memory usage history, a battery usage history, a location history, etc. using an artificial neural network; and the content migration can be performed by remapping virtual memory regions in the memory maps of the computing devices.