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公开(公告)号：US20170359038A1
公开(公告)日：2017-12-14
申请号：US15600993
申请日：2017-05-22
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Satoshi TANAKA , Kazuo WATANABE , Takayuki TSUTSUI , Masao KONDO , Satoshi ARAYASHIKI , Fumio HARIMA , Masatoshi HASE
IPC: H03F3/24 , H04L5/14 , H03F3/21 , H03F3/195 , H04L5/00 , H03F1/56 , H03F1/02 , H03F3/00 , H04W88/00
CPC classification number: H03F3/245 , H03F1/0205 , H03F1/0272 , H03F1/0277 , H03F1/22 , H03F1/565 , H03F3/005 , H03F3/195 , H03F3/21 , H03F2200/222 , H03F2200/318 , H03F2200/387 , H03F2200/408 , H03F2200/451 , H03F2200/555 , H04L5/0007 , H04L5/14 , H04W88/00
Abstract: A power amplifier circuit includes first and second transistors and a first voltage output circuit. A radio frequency signal is input into a base of the first transistor. The first voltage output circuit outputs a first voltage in accordance with a power supply voltage. The first voltage is supplied to a base or a gate of the second transistor. An emitter or a source of the second transistor is connected to a collector of the first transistor. A first amplified signal generated by amplifying the radio frequency signal is output from a collector or a drain of the second transistor.
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公开(公告)号：US20170302301A1
公开(公告)日：2017-10-19
申请号：US15490073
申请日：2017-04-18
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Satoshi TANAKA , Kazuo WATANABE , Tetsuaki ADACHI , Masahito NUMANAMI , Yasuhisa YAMAMOTO
CPC classification number: H04B1/005 , H04L25/02 , H04W72/0453 , H04W88/06 , H04W88/08
Abstract: A communication unit includes the following elements. A first transmit circuit outputs a first signal or a second signal from a first input signal. A first amplifier amplifies the first signal and outputs a first amplified signal. A first signal generating circuit generates a third signal having a frequency higher than a frequency of the second signal, based on the second signal and a first reference signal. A first filter circuit receives the third signal and allows one of a frequency component representing a sum of the frequency of the second signal and a frequency of the first reference signal and a frequency component representing a difference therebetween to pass through the first filter circuit and attenuates the other one of the frequency components. A second amplifier amplifies the third signal output from the first filter circuit and outputs a second amplified signal.
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公开(公告)号：US20210234519A1
公开(公告)日：2021-07-29
申请号：US17207879
申请日：2021-03-22
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Satoshi TANAKA , Kazuo WATANABE , Yusuke TANAKA , Satoshi ARAYASHIKI
Abstract: A power amplifier circuit includes a lower transistor having a first terminal, a second terminal connected to ground, and a third terminal, wherein a first power supply voltage is supplied to the first terminal, and an input signal is supplied to the third terminal; a first capacitor; an upper transistor having a first terminal, a second terminal connected to the first terminal of the lower transistor via the first capacitor, and a third terminal, wherein a second power supply voltage is supplied to the first terminal, an amplified signal is outputted to an output terminal from the first terminal, and a driving voltage is supplied to the third terminal; a first inductor that connects the second terminal of the upper transistor to ground; a voltage regulator circuit; and at least one termination circuit that short-circuits an even-order harmonic or odd-order harmonic of the amplified signal to ground potential.
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公开(公告)号：US20200313629A1
公开(公告)日：2020-10-01
申请号：US16828630
申请日：2020-03-24
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Toshikazu TERASHIMA , Satoshi TANAKA , Kazuo WATANABE , Makoto ITOU , Jun ENOMOTO
Abstract: A power amplifier circuit includes a first transistor, a capacitor, and a second transistor. The first transistor has an emitter electrically connected to a reference potential, a base, and a collector electrically connected to a first power supply potential. A first end of the capacitor is electrically connected to the collector of the first transistor. The second transistor has an emitter electrically connected to a second end of the capacitor and electrically connected to the reference potential, a base, and a collector electrically connected to the first power supply potential. An RF output signal obtained by amplifying the RF input signal is output from the collector of the second transistor. A second bias circuit includes a third transistor having a collector electrically connected to a second power supply potential, a base, and an emitter from which the second bias current or voltage is output.
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公开(公告)号：US20200304073A1
公开(公告)日：2020-09-24
申请号：US16821282
申请日：2020-03-17
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Satoshi TANAKA , Kazuo WATANABE , Satoshi ARAYASHIKI
Abstract: A power amplifier circuit includes an amplifier transistor having a first terminal supplied with a power supply voltage that changes in accordance with an amplitude level of an input signal, and a second terminal supplied with the input signal and a bias current, an amplified signal obtained by amplifying the input signal being outputted from the first terminal, a bias circuit that outputs the bias current from an output terminal thereof in accordance with a reference current supplied to an input terminal thereof, and a regulation circuit that generates a regulation current for regulating the bias current in accordance with a change in the power supply voltage. The regulation current increases with an increase in the power supply voltage, and decreases with a decrease in the power supply voltage. The regulation circuit extracts the regulation current from at least one of the reference current or the bias current.
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Patent Agency Ranking
公开(公告)号：US20200212846A1
公开(公告)日：2020-07-02
申请号：US16721062
申请日：2019-12-19
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Satoshi TANAKA , Kazuo WATANABE , Satoshi ARAYASHIKI
Abstract: A power amplifier circuit includes a first transistor; a first bias circuit that supplies a first bias current or voltage; a capacitor; a first inductor; a second inductor; a second transistor; a second bias circuit that supplies a second bias current or voltage; a third inductor; a third transistor; a third bias circuit that supplies a third bias current or voltage; and a fourth inductor.
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公开(公告)号：US20190190546A1
公开(公告)日：2019-06-20
申请号：US16285408
申请日：2019-02-26
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Satoshi TANAKA , Kazuo WATANABE , Tetsuaki ADACHI , Masahito NUMANAMI , Yasuhisa YAMAMOTO
CPC classification number: H04B1/005 , H04L25/02 , H04W72/0453 , H04W88/06 , H04W88/08
Abstract: A communication unit includes the following elements. A first transmit circuit outputs a first signal or a second signal from a first input signal. A first amplifier amplifies the first signal and outputs a first amplified signal. A first signal generating circuit generates a third signal having a frequency higher than a frequency of the second signal, based on the second signal and a first reference signal. A first filter circuit receives the third signal and allows one of a frequency component representing a sum of the frequency of the second signal and a frequency of the first reference signal and a frequency component representing a difference therebetween to pass through the first filter circuit and attenuates the other one of the frequency components. A second amplifier amplifies the third signal output from the first filter circuit and outputs a second amplified signal.
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公开(公告)号：US20170302300A1
公开(公告)日：2017-10-19
申请号：US15490021
申请日：2017-04-18
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Satoshi TANAKA , Kazuo WATANABE , Tetsuaki ADACHI , Masahito NUMANAMI , Yasuhisa YAMAMOTO
CPC classification number: H04B1/005 , H04L25/02 , H04W72/0453 , H04W88/06 , H04W88/08
Abstract: A communication unit includes the following elements. A first transmit circuit outputs a first signal or a second signal from a first input signal. A first amplifier amplifies the first signal and outputs a first amplified signal. A first signal generating circuit generates a third signal having a frequency higher than a frequency of the second signal, based on the second signal and a first reference signal. A first filter circuit receives the third signal and allows one of a frequency component representing a sum of the frequency of the second signal and a frequency of the first reference signal and a frequency component representing a difference therebetween to pass through the first filter circuit and attenuates the other one of the frequency components. A second amplifier amplifies the third signal output from the first filter circuit and outputs a second amplified signal.
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公开(公告)号：US20210175857A1
公开(公告)日：2021-06-10
申请号：US17109389
申请日：2020-12-02
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Jun ENOMOTO , Kazuo WATANABE , Satoshi TANAKA , Yusuke TANAKA , Makoto ITOU
Abstract: A power amplifier circuit includes first and second bias circuits configured to provide first and second biases, respectively, a first transistor having an emitter connected to a reference potential, a base configured to receive the first bias via a first resistor and receive a radio-frequency input signal via a first capacitor, and a collector configured to output an amplified radio-frequency signal, a second transistor having a base connected to the reference potential via a second capacitor and configured to receive the second bias via a second resistor, an emitter configured to receive the radio-frequency signal, and a collector connected to a power supply potential via a third inductor and configured to output a radio-frequency output signal, and an impedance circuit having a first end connected to an output section of the second bias circuit and configured to apply an alternating-current signal to a path extending from the second bias circuit.
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公开(公告)号：US20210044262A1
公开(公告)日：2021-02-11
申请号：US17078876
申请日：2020-10-23
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Satoshi ARAYASHIKI , Kazuo WATANABE , Satoshi TANAKA
Abstract: A power amplifier circuit includes lower-stage and upper-stage differential amplifying pairs, a combiner, first and second inductors, and first and second capacitors. First and second signals are input into the lower-stage differential amplifying pair. The upper-stage differential amplifying pair outputs first and second amplified signals. The combiner combines the first and second amplified signals. The lower-stage differential amplifying pair includes first and second transistors. A supply voltage is supplied to the collectors of the first and second transistors. The first and second signals are supplied to the bases of the first and second transistors. The upper-stage differential amplifying pair includes third and fourth transistors. A supply voltage is supplied to the collectors of the third and fourth transistors. The emitters of the third and fourth transistors are grounded via the first and second inductors and are connected to the first and second transistors via the first and second capacitors.
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