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公开(公告)号：US11368176B2
公开(公告)日：2022-06-21
申请号：US17088246
申请日：2020-11-03
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Kiichiro Takenaka
Abstract: A transmission unit includes: a power amplification module that amplifies the power of an input signal and outputs an amplified signal; and a power supply module that supplies a power supply voltage to the power amplification module on the basis of a first control signal corresponding to the band width of the input signal. On the basis of the first control signal, the power supply module varies the power supply voltage in accordance with the amplitude level of the input signal in the case where the band width of the input signal is a first band width and varies the power supply voltage in accordance with the average output power of the power amplification module in the case where the band width of the input signal is a second band width that is larger than the first band width.
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公开(公告)号：US11290964B2
公开(公告)日：2022-03-29
申请号：US17229412
申请日：2021-04-13
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Satoshi Tanaka , Kiichiro Takenaka , Takayuki Tsutsui , Taizo Yamawaki , Shun Imai
IPC: H04W52/24 , H04W52/02 , H03F3/189 , H03F3/24 , H04B1/04 , H03F1/02 , H03F3/19 , H03F3/21 , H04W88/06
Abstract: A high-frequency signal processing apparatus and a wireless communication apparatus can achieve a decrease in power consumption. For example, when an indicated power level to a high-frequency power amplifier is equal to or greater than a second reference value, envelope tracking is performed by causing a source voltage control circuit to control a high-speed DCDC converter using a detection result of an envelope detecting circuit and causing a bias control circuit to indicate a fixed bias value. The source voltage control circuit and the bias control circuit indicate a source voltage and a bias value decreasing in proportion to a decrease in the indicated power level when the indicated power level is in a range of the second reference value to the first reference value, and indicate a fixed source voltage and a fixed bias value when the indicated power level is less than the first reference value.
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公开(公告)号：US11006371B2
公开(公告)日：2021-05-11
申请号：US16989993
申请日：2020-08-11
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Satoshi Tanaka , Kiichiro Takenaka , Takayuki Tsutsui , Taizo Yamawaki , Shun Imai
IPC: H04W52/24 , H04W52/02 , H03F3/189 , H03F3/24 , H04B1/04 , H03F1/02 , H03F3/19 , H03F3/21 , H04W88/06
Abstract: A high-frequency signal processing apparatus and a wireless communication apparatus can achieve a decrease in power consumption. For example, when an indicated power level to a high-frequency power amplifier is equal to or greater than a second reference value, envelope tracking is performed by causing a source voltage control circuit to control a high-speed DCDC converter using a detection result of an envelope detecting circuit and causing a bias control circuit to indicate a fixed bias value. The source voltage control circuit and the bias control circuit indicate a source voltage and a bias value decreasing in proportion to a decrease in the indicated power level when the indicated power level is in a range of the second reference value to the first reference value, and indicate a fixed source voltage and a fixed bias value when the indicated power level is less than the first reference value.
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公开(公告)号：US10804856B2
公开(公告)日：2020-10-13
申请号：US16527203
申请日：2019-07-31
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Kiichiro Takenaka
Abstract: A power amplifier includes a distributor distributing an input first signal to a second signal and a third signal delayed by about 2ϕ degrees (45
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公开(公告)号：US20180213488A1
公开(公告)日：2018-07-26
申请号：US15924861
申请日：2018-03-19
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Satoshi Tanaka , Kiichiro Takenaka , Takayuki Tsutsui , Taizo Yamawaki , Shun Imai
CPC classification number: H04W52/246 , H03F1/0216 , H03F1/0227 , H03F1/0277 , H03F3/189 , H03F3/19 , H03F3/21 , H03F3/24 , H03F2200/102 , H03F2200/294 , H03F2200/504 , H04B1/0475 , H04W52/0251 , H04W52/0261 , H04W88/06 , Y02D70/00 , Y02D70/1246 , Y02D70/1262 , Y02D70/40
Abstract: A high-frequency signal processing apparatus and a wireless communication apparatus can achieve a decrease in power consumption. For example, when an indicated power level to a high-frequency power amplifier is equal to or greater than a second reference value, envelope tracking is performed by causing a source voltage control circuit to control a high-speed DCDC converter using a detection result of an envelope detecting circuit and causing a bias control circuit to indicate a fixed bias value. The source voltage control circuit and the bias control circuit indicate a source voltage and a bias value decreasing in proportion to a decrease in the indicated power level when the indicated power level is in a range of the second reference value to the first reference value, and indicate a fixed source voltage and a fixed bias value when the indicated power level is less than the first reference value.
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Patent Agency Ranking
公开(公告)号：US10020779B2
公开(公告)日：2018-07-10
申请号：US15251031
申请日：2016-08-30
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Kiichiro Takenaka , Masahiro Ito , Masakazu Hori , Mitsuo Ariie , Hayato Nakamura , Satoshi Arayashiki , Hidetoshi Matsumoto , Tsuyoshi Sato , Satoshi Tanaka
IPC: H03F3/191 , H03F1/02 , H03F3/21 , H03F1/32 , H03F1/52 , H03F3/19 , H03F1/56 , H03G3/00 , H03F1/42 , H03F3/04
CPC classification number: H03F1/0222 , H03F1/02 , H03F1/0216 , H03F1/0261 , H03F1/32 , H03F1/42 , H03F1/52 , H03F1/56 , H03F3/04 , H03F3/19 , H03F3/21 , H03F2200/102 , H03F2200/408 , H03F2200/411 , H03F2200/444 , H03F2200/451 , H03G3/004
Abstract: Improvement in linearity is achieved at low costs in a power amplifier module employing an envelope tracking system. The power amplifier module includes a first power amplifier circuit that amplifies a radio frequency signal and that outputs a first amplified signal, a second power amplifier circuit that amplifies the first amplified signal on the basis of a source voltage varying depending on amplitude of the radio frequency signal and that outputs a second amplified signal, and a matching circuit that includes first and second capacitors connected in series between the first and second power amplifier circuit and an inductor connected between a node between the first and second capacitors and a ground and that decreases a gain of the first power amplifier circuit as the source voltage of the second power amplifier circuit increases.
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公开(公告)号：US20180027503A1
公开(公告)日：2018-01-25
申请号：US15720188
申请日：2017-09-29
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Satoshi Tanaka , Kiichiro Takenaka , Takayuki Tsutsui , Taizo Yamawaki , Shun Imai
CPC classification number: H04W52/246 , H03F1/0216 , H03F1/0227 , H03F1/0277 , H03F3/189 , H03F3/19 , H03F3/21 , H03F3/24 , H03F2200/102 , H03F2200/294 , H03F2200/504 , H04B1/0475 , H04W52/0251 , H04W52/0261 , H04W88/06 , Y02D70/00 , Y02D70/1246 , Y02D70/1262 , Y02D70/40
Abstract: A high-frequency signal processing apparatus and a wireless communication apparatus can achieve a decrease in power consumption. For example, when an indicated power level to a high-frequency power amplifier is equal to or greater than a second reference value, envelope tracking is performed by causing a source voltage control circuit to control a high-speed DCDC converter using a detection result of an envelope detecting circuit and causing a bias control circuit to indicate a fixed bias value. The source voltage control circuit and the bias control circuit indicate a source voltage and a bias value decreasing in proportion to a decrease in the indicated power level when the indicated power level is in a range of the second reference value to the first reference value, and indicate a fixed source voltage and a fixed bias value when the indicated power level is less than the first reference value.
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公开(公告)号：US09807703B2
公开(公告)日：2017-10-31
申请号：US15598608
申请日：2017-05-18
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Satoshi Tanaka , Kiichiro Takenaka , Takayuki Tsutsui , Taizo Yamawaki , Shun Imai
CPC classification number: H04W52/246 , H03F1/0216 , H03F1/0227 , H03F1/0277 , H03F3/189 , H03F3/19 , H03F3/21 , H03F3/24 , H03F2200/102 , H03F2200/294 , H03F2200/504 , H04B1/0475 , H04W52/0251 , H04W52/0261 , H04W88/06 , Y02D70/00 , Y02D70/1246 , Y02D70/1262 , Y02D70/40
Abstract: A high-frequency signal processing apparatus and a wireless communication apparatus can achieve a decrease in power consumption. For example, when an indicated power level to a high-frequency power amplifier is equal to or greater than a second reference value, envelope tracking is performed by causing a source voltage control circuit to control a high-speed DCDC converter using a detection result of an envelope detecting circuit and causing a bias control circuit to indicate a fixed bias value. The source voltage control circuit and the bias control circuit indicate a source voltage and a bias value decreasing in proportion to a decrease in the indicated power level when the indicated power level is in a range of the second reference value to the first reference value, and indicate a fixed source voltage and a fixed bias value when the indicated power level is less than the first reference value.
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19.发明授权公开(公告)号：US09585105B2
公开(公告)日：2017-02-28
申请号：US15241991
申请日：2016-08-19
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Satoshi Tanaka , Kiichiro Takenaka , Takayuki Tsutsui , Taizo Yamawaki , Shun Imai
CPC classification number: H04W52/246 , H03F1/0216 , H03F1/0227 , H03F1/0277 , H03F3/189 , H03F3/19 , H03F3/21 , H03F3/24 , H03F2200/102 , H03F2200/294 , H03F2200/504 , H04B1/0475 , H04W52/0251 , H04W52/0261 , H04W88/06 , Y02D70/00 , Y02D70/1246 , Y02D70/1262 , Y02D70/40
Abstract: A high-frequency signal processing apparatus and a wireless communication apparatus can achieve a decrease in power consumption. For example, when an indicated power level to a high-frequency power amplifier is equal to or greater than a second reference value, envelope tracking is performed by causing a source voltage control circuit to control a high-speed DCDC converter using a detection result of an envelope detecting circuit and causing a bias control circuit to indicate a fixed bias value. The source voltage control circuit and the bias control circuit indicate a source voltage and a bias value decreasing in proportion to a decrease in the indicated power level when the indicated power level is in a range of the second reference value to the first reference value, and indicate a fixed source voltage and a fixed bias value when the indicated power level is less than the first reference value.
Abstract translation: 高频信号处理装置和无线通信装置可以实现功耗的降低。 例如，当向高频功率放大器指示的功率电平等于或大于第二参考值时，通过使源电压控制电路使用检测结果控制高速DCDC转换器来执行包络跟踪 包络检测电路，并使偏置控制电路指示固定的偏置值。 源电压控制电路和偏置控制电路指示当所指示的功率电平在第二参考值到第一参考值的范围内时，源电压和偏置值与指示功率电平的减小成比例地减小，以及 当指示的功率电平小于第一参考值时，指示固定的源电压和固定的偏置值。
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公开(公告)号：US20160373069A1
公开(公告)日：2016-12-22
申请号：US15251012
申请日：2016-08-30
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Kiichiro Takenaka , Masahiro Ito , Masakazu Hori , Mitsuo Ariie , Hayato Nakamura , Satoshi Arayashiki , Hidetoshi Matsumoto , Tsuyoshi Sato , Satoshi Tanaka
CPC classification number: H03F1/0222 , H03F1/02 , H03F1/0216 , H03F1/0261 , H03F1/32 , H03F1/42 , H03F1/52 , H03F1/56 , H03F3/04 , H03F3/19 , H03F3/21 , H03F2200/102 , H03F2200/408 , H03F2200/411 , H03F2200/444 , H03F2200/451 , H03G3/004
Abstract: Improvement in linearity is achieved at low costs in a power amplifier module employing an envelope tracking system. The power amplifier module includes a first power amplifier circuit that amplifies a radio frequency signal and that outputs a first amplified signal, a second power amplifier circuit that amplifies the first amplified signal on the basis of a source voltage varying depending on amplitude of the radio frequency signal and that outputs a second amplified signal, and a matching circuit that includes first and second capacitors connected in series between the first and second power amplifier circuit and an inductor connected between a node between the first and second capacitors and a ground and that decreases a gain of the first power amplifier circuit as the source voltage of the second power amplifier circuit increases.
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