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公开(公告)号:US20230290737A1
公开(公告)日:2023-09-14
申请号:US17694330
申请日:2022-03-14
Applicant: NXP B.V.
Inventor: Antonius Hendrikus Jozef Kamphuis , Mustafa Acar , Philipp Franz Freidl , Rajesh Mandamparambil , Jan Willem Bergman
IPC: H01L23/552 , H01L23/48 , H01L23/31 , H01L21/56
CPC classification number: H01L23/552 , H01L23/481 , H01L23/3128 , H01L21/56
Abstract: A flip chip device includes a substrate, an integrated circuit device, a mold compound, and a via. The substrate has a top side and a bottom side. The integrated circuit device is affixed to the bottom side of the substrate. The mold compound is affixed to the bottom side of the substrate. The via is affixed to the bottom side of the substrate. The via passes through the mold compound and is exposed at a bottom side of the mold compound. The via is coupled to a terminal of the integrated circuit device.
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公开(公告)号:US20220384943A1
公开(公告)日:2022-12-01
申请号:US17664089
申请日:2022-05-19
Applicant: NXP B.V.
Inventor: Mustafa Acar , Philipp Franz Freidl , Antonius Hendrikus Jozef Kamphuis , Jan Willem Bergman , Rajesh Mandamparambil
IPC: H01Q1/48
Abstract: A semiconductor device may include an antenna array and a grounding assembly configured to at least partially electrically shield the antenna array. The grounding assembly may include a first grounding layer comprising a first plurality of openings and a second grounding layer comprising a second plurality of openings. The second grounding layer may at least partially occlude the first plurality of openings of the first grounding layer when viewed from above the antenna array.
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公开(公告)号:US09379071B2
公开(公告)日:2016-06-28
申请号:US14255935
申请日:2014-04-17
Applicant: NXP B.V.
Inventor: Tonny Kamphuis , Jan Gulpen , Jan Willem Bergman
CPC classification number: H01L24/06 , H01L23/293 , H01L23/3114 , H01L23/49805 , H01L23/49838 , H01L2224/05005 , H01L2224/05012 , H01L2224/0612 , H01L2224/49171 , H01L2924/00014 , H01L2924/01029 , H01L2924/0105 , H01L2924/014 , H01L2924/10253 , H01L2224/45099
Abstract: Embodiments of a packaged semiconductor device with no leads are disclosed. One embodiment includes a semiconductor chip and a no leads package structure defining a boundary and having a bottom surface and includes three or more pads exposed at the bottom surface of the package structure. Each of the pads is located in a single inline row.
Abstract translation: 公开了没有引线的封装半导体器件的实施例。 一个实施例包括限定边界并具有底表面的半导体芯片和无引线封装结构,并且包括暴露在封装结构的底表面处的三个或更多个焊盘。 每个垫片都位于一个单列排列中。
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