公开(公告)号：US09705544B2

公开(公告)日：2017-07-11

申请号：US15135653

申请日：2016-04-22

Applicant: NXP B.V.

Inventor： Remco van de Beek ,  Jos Verlinden

IPC: H03K9/00 ,  H03D1/06 ,  H04B1/12 ,  H04B1/40 ,  H04L27/06

CPC classification number: H04B1/12 ,  H04B1/40 ,  H04L27/06 ,  H04L27/066

Abstract: A receiver and method for a wireless signal transmission system use digital amplitude modulation of a base band signal having a symbol clock frequency. The receiver includes a reference generator which generates a local reference frequency, a mixer to extract the base band signal, a high pass filter to suppress a DC component, an amplifier, an analog-to-digital converter and a digital signal processor to receive digital signals and extract symbols. A base band signal rotation detection circuit detects rotation of the base band signal upstream of the high pass filter. The digital signal processor determines a symbol clock phase by generating a coarse estimate of the symbol clock phase and correcting the coarse estimate based on detected rotations of the base band signal. A determination that the symbol clock phase corresponds to a complete rotation is used in relation to the extraction of symbols.

公开(公告)号：US09686041B2

公开(公告)日：2017-06-20

申请号：US14841644

申请日：2015-08-31

Applicant: NXP B.V.

Inventor： Remco van de Beek ,  Massimo Ciacci ,  Ghiath Al-kadi

IPC: H04B5/00 ,  H04L5/12 ,  H04L27/22 ,  H04L1/00 ,  G06K19/067 ,  H04L7/04 ,  H04L27/227 ,  H04L27/00 ,  H04L5/00

CPC classification number: H04L1/0039 ,  G06K19/067 ,  H04B5/0031 ,  H04B5/0062 ,  H04B5/0093 ,  H04L5/001 ,  H04L7/041 ,  H04L7/042 ,  H04L27/22 ,  H04L27/227 ,  H04L27/2272 ,  H04L27/2273 ,  H04L2027/0036 ,  H04L2027/0057 ,  H04L2027/0095

Abstract: An apparatus for detecting the end of a communication is disclosed. The apparatus includes an interface circuit for receiving an encoded signal and a carrier signal recovery circuit coupled to an output of the interface circuit. The carrier signal recovery circuit is configured to output a carrier signal of the encoded signal and a second signal that is out of phase with the carrier signal. The apparatus also includes a decoding circuit configured to decode the encoded signal as a function of both the encoded signal and the carrier signal output by the carrier signal recovery circuit. The apparatus also includes a detection circuit configured to detect an indication of an end of a communication in the encoded signal as a function of both the encoded signal and the second signal.

公开(公告)号：US20150372787A1

公开(公告)日：2015-12-24

申请号：US14841644

申请日：2015-08-31

Applicant: NXP B.V.

Inventor： Remco van de Beek ,  Massimo Ciacci ,  Ghiath Al-kadi

IPC: H04L1/00 ,  H04B5/00

CPC classification number: H04L1/0039 ,  G06K19/067 ,  H04B5/0031 ,  H04B5/0062 ,  H04B5/0093 ,  H04L5/001 ,  H04L7/041 ,  H04L7/042 ,  H04L27/22 ,  H04L27/227 ,  H04L27/2272 ,  H04L27/2273 ,  H04L2027/0036 ,  H04L2027/0057 ,  H04L2027/0095

Abstract: An apparatus for detecting the end of a communication is disclosed. The apparatus includes an interface circuit for receiving an encoded signal and a carrier signal recovery circuit coupled to an output of the interface circuit. The carrier signal recovery circuit is configured to output a carrier signal of the encoded signal and a second signal that is out of phase with the carrier signal. The apparatus also includes a decoding circuit configured to decode the encoded signal as a function of both the encoded signal and the carrier signal output by the carrier signal recovery circuit. The apparatus also includes a detection circuit configured to detect an indication of an end of a communication in the encoded signal as a function of both the encoded signal and the second signal.

Abstract translation: 公开了一种用于检测通信结束的装置。 该装置包括用于接收编码信号的接口电路和耦合到接口电路的输出的载波信号恢复电路。 载波信号恢复电路被配置为输出编码信号的载波信号和与载波信号异相的第二信号。 该装置还包括解码电路，其被配置为根据由载波信号恢复电路输出的编码信号和载波信号两者对编码信号进行解码。 该装置还包括检测电路，其被配置为根据编码信号和第二信号来检测编码信号中的通信结束的指示。

公开(公告)号：US20140145787A1

公开(公告)日：2014-05-29

申请号：US13684886

申请日：2012-11-26

Applicant: NXP B.V.

Inventor： Jos Verlinden ,  Remco van de Beek ,  Massimo Ciacci

IPC: H03G1/04 ,  H03F3/68

CPC classification number: H03G1/04 ,  H03F3/005 ,  H03F3/189 ,  H03F3/211 ,  H03F3/2175 ,  H03F3/245 ,  H03F3/68 ,  H03M1/662 ,  H03M1/804

Abstract: Signals are processed to facilitate the mitigation and/or cancellation of undesirable components within the signal. As consistent with one or more embodiments, input/delay circuits offset the phase of an input signal, as presented to respective amplifiers. The phase offset is used, upon combination of the outputs of the respective amplifiers, to cancel the undesirable components of the signal. Such an approach may, for example, involve phase offset in a digital domain, with correction upon combination of the signals as presented in an analog domain.

Abstract translation: 对信号进行处理以便于消除和/或消除信号内不期望的组件。 与一个或多个实施例一致，输入/延迟电路将输入信号的相位偏移到相应的放大器。 在相应放大器的输出组合时，使用相位偏移来消除信号的不期望的分量。 例如，这种方法可以涉及在数字域中的相位偏移，并且在模拟域中呈现的信号的组合进行校正。