Method of and apparatus for copying originals in which an image to be
printed is evaluated by observing a corresponding low-resolution video
image
    11.
    发明授权
    Method of and apparatus for copying originals in which an image to be printed is evaluated by observing a corresponding low-resolution video image 失效
    通过观察相应的低分辨率视频图像来评估要打印的图像的原稿的复印方法和装置

    公开(公告)号:US4825296A

    公开(公告)日:1989-04-25

    申请号:US85941

    申请日:1987-08-14

    摘要: An original to be copied is electrooptically scanned point-by-point. The resulting imaging signals are stored in a first memory and then forwarded to a first image processing unit where the signals are electronically corrected to enhance the image of the original. The corrected signals are loaded into a second memory. A portion of the corrected signals is recalled from the second memory and sent to a third memory. This portion of the corrected signals is then transmitted to a second image processing unit and thereafter converted into a low-resolution video image which can be inspected to determine image quality. If image quality is satisfactory, the contents of the second memory are sent to an exposure unit which prints a high-resolution image of the original on copy material. Imaging signals for a second original are loaded into the first memory as the contents of the second memory are recalled for printing. The second processing unit functions to adjust the video image so that it closely corresponds to the printed image of the original.

    摘要翻译: 要复制的原件将逐点电子扫描。 所得到的成像信号被存储在第一存储器中,然后被转发到第一图像处理单元,其中信号被电子校正以增强原件的图像。 校正的信号被加载到第二存储器中。 校正信号的一部分从第二存储器被调用并被发送到第三存储器。 然后将该部分的校正信号发送到第二图像处理单元,然后转换成可以被检查以确定图像质量的低分辨率视频图像。 如果图像质量令人满意,则将第二存储器的内容发送到在复印材料上打印原稿的高分辨率图像的曝光单元。 当第二个存储器的内容被调用以进行打印时,将第二个原件的成像信号加载到第一个存储器中。 第二处理单元用于调整视频图像,使其与原稿的打印图像紧密对应。

    Light totalizing system for photographic camera provided with a
shutter-diaphragm
    12.
    发明授权
    Light totalizing system for photographic camera provided with a shutter-diaphragm 失效
    配有快门隔膜的摄影相机的光累加系统

    公开(公告)号:US4251142A

    公开(公告)日:1981-02-17

    申请号:US37456

    申请日:1979-05-09

    IPC分类号: G03B7/097 G03B7/091 G03B9/62

    CPC分类号: G03B7/097

    摘要: During the ongoing course of the exposure, the aperture area increases linearly to a maximum value and then stays at the maximum value, the instantaneous amount of exposure light therefore changing correspondingly, even if the ambient-light level remains constant during the exposure. A pulse generator includes a photodetector exposed to ambient light and generates a pulse train of light-dependent repetition frequency, the pulses of which are counted by a light-totalizing counter which eventually generates a terminate-exposure signal. Ideally, the repetition frequency should increase steplessly and linearly, for maximum accuracy, or second best increase stepwise in small steps to approximate to a stepless linear increase, but in order to use an extremely low number of stepwise frequency changes, without loss of system accuracy, no attempt is made to per se keep the light-indicating repetition frequency accurate. Instead, the number and amounts of the repetition-frequency changes are so established that, when the repetition frequency is plotted against elapsed exposure time, it is proportional to a piecewise linearization of the time integral curve of the exposure-aperture surface area, the constituent straight-line segments of the linearization being confined within a predetermined error-of-total-exposure tolerance range. In the case of a linear increase of aperture size concluding in maximum size, this corresponding to a quadratic followed by a straight-line rise of the time integral of the exposure-aperture surface area, the requisite time integral curve, despite its complexity, can, for example, be implemented using as few as only three or even as few as two stepwise changes of repetition frequency, without loss of system accuracy.

    摘要翻译: 在正在进行的曝光过程中,孔径面积线性增加到最大值,然后保持在最大值,因此即使在曝光期间环境光水平保持恒定,曝光光线的瞬时量也相应地改变。 脉冲发生器包括暴露于环境光的光电检测器,并产生依赖于光的重复频率的脉冲序列,其脉冲由最终产生终止曝光信号的光累计计数器进行计数。 理想情况下,为了最大的精度,重复频率应该无级地和线性地增加,或者以小的步骤逐步增加,以逼近无级线性增加,但是为了使用极低数量的逐步频率变化,而不损失系统精度 没有尝试本身保持指示重复频率的准确性。 相反,重复频率变化的数量和数量是如此确定的,当重复频率相对于经过的曝光时间绘制时,它与曝光孔表面积的时间积分曲线的分段线性化成正比,成分 线性化的直线段被限制在预定的总曝光容差范围内。 在最大尺寸结束的孔径尺寸线性增加的情况下,这对应于二次曲线,随后是曝光孔表面积的时间积分的直线上升,所需的时间积分曲线尽管复杂,但可以 例如,使用只有三个甚至仅次于两次重复频率的逐步改变来实现,而不损失系统精度。

    HEADBOX FOR A MACHINE TO PRODUCE A FIBER WEB
    14.
    发明申请
    HEADBOX FOR A MACHINE TO PRODUCE A FIBER WEB 审中-公开
    用于制造纤维网的机器的头架

    公开(公告)号:US20120138251A1

    公开(公告)日:2012-06-07

    申请号:US13314793

    申请日:2011-12-08

    IPC分类号: D21F1/06

    CPC分类号: D21F1/02 D21F1/028

    摘要: Headbox for a machine to produce a fiber web, in particular a paper, cardboard or tissue web from at least one fibrous suspension, having a headbox nozzle comprising an upper nozzle wall and a lower nozzle wall, as well as two side walls tapering to form an outlet, and having an inner chamber through which the fibrous suspension flows in flow direction during operation of headbox, whereby on upper nozzle wall of headbox nozzle a baffle is arranged on the outlet side which is movable by way of several elements and which extends across machine width, and which has a baffle protrusion and a baffle immersion depth and which has at least two surfaces—an upstream ramp surface and a subsequent main surface contacted by a fibrous suspension during operation of headbox. The inventive headbox is characterized in that between ramp surface of baffle and main surface of baffle at least one refraction surface which is in contact during operation of headbox with a fibrous suspension is provided on baffle.

    摘要翻译: 用于机器的流浆箱,用于从至少一个纤维悬浮液产生纤维网,特别是纸,纸板或纸巾纸,其具有包括上喷嘴壁和下喷嘴壁的流浆箱喷嘴,以及渐缩形成的两个侧壁 出口,并且具有内室,纤维悬浮液在流浆箱操作期间沿流动方向流动,由此在流浆箱喷嘴的上喷嘴壁上,挡板布置在出口侧,出口侧可通过若干元件移动并延伸穿过 机器宽度,并且其具有挡板突起和挡板浸入深度,并且具有至少两个表面 - 在流浆箱操作期间由纤维悬浮液接触的上游斜面和随后的主表面。 本发明的流浆箱的特征在于,在挡板的斜面和挡板的主表面之间,在挡板上提供了在具有纤维悬浮液的流浆箱操作期间接触的至少一个折射表面。

    HEADBOX FOR A MACHINE FOR PRODUCING A FIBROUS WEB
    15.
    发明申请
    HEADBOX FOR A MACHINE FOR PRODUCING A FIBROUS WEB 失效
    用于制造纤维网的机器的头架

    公开(公告)号:US20110265968A1

    公开(公告)日:2011-11-03

    申请号:US13102688

    申请日:2011-05-06

    IPC分类号: D21F1/02

    CPC分类号: D21F1/02 D21F1/022

    摘要: The invention relates to a headbox which comprises a feed device feeding the at least one fiber suspension, a perforated distribution pipe plate arranged immediately downstream thereof and having a plurality of channels arranged in lines and columns, an intermediate channel arranged downstream thereof, extending over the width of the headbox and having a plurality of means for dosing a fluid in partial fluid streams to the at least one fiber suspension in a preferably adjustable/controlled manner, the means being spaced apart from each other in the width direction of the headbox and the individual means comprising a plurality of dosing channels having respective dosing channel openings and an opening center line, arriving at different levels and being connected to a common supply channel. The headbox further comprises a downstream turbulence generator having a plurality of flow channels arranged in lines and columns and a headbox nozzle which is directly contiguous to the turbulence generator and which has a nozzle gap. The headbox according to the invention has a system pressure loss which is substantially composed of a first pressure loss between the feed device and the intermediate channel and a second pressure loss in the turbulence generator, the second pressure loss and the first pressure loss being in a ratio ranging from 8:1 to 1:1, preferably from 4:1 to 1:1, particularly from 2:1 to 1:1.

    摘要翻译: 本发明涉及一种流浆箱,其包括供给至少一个纤维悬浮液的进料装置,一个布置在其下游的多孔分配管板,并且具有排列成直线和立柱的多个通道,布置在其下游的中间通道, 流浆箱的宽度并且具有多个用于将部分流体流中的流体以优选可调节/受控的方式计量至少一个纤维悬浮液的装置,所述装置在流浆箱的宽度方向上彼此间隔开, 各个装置包括具有相应配量通道开口和开口中心线的多个计量通道,达到不同的水平并连接到共同的供应通道。 流浆箱还包括下游湍流发生器,其具有以行和列排列的多个流动通道和与湍流发生器直接邻接且具有喷嘴间隙的流浆箱喷嘴。 根据本发明的流浆箱具有系统压力损失,其基本上由进料装置和中间通道之间的第一压力损失和湍流发生器中的第二压力损失构成,第二压力损失和第一压力损失在 比率为8:1至1:1,优选4:1至1:1,特别是2:1至1:1。

    SYSTEM AND METHOD FOR TESTING SEMICONDUCTOR DEVICES
    16.
    发明申请
    SYSTEM AND METHOD FOR TESTING SEMICONDUCTOR DEVICES 审中-公开
    用于测试半导体器件的系统和方法

    公开(公告)号:US20090085596A1

    公开(公告)日:2009-04-02

    申请号:US11863900

    申请日:2007-09-28

    IPC分类号: G01R31/02

    摘要: A system for testing semiconductor devices is disclosed. In one embodiment, the test system being configured to be electrically connected via parallel wiring paths to a plurality of contact pins of a number of devices under test. The test system having at least one signal distribution matrix arranged in the wiring path to provide signals for testing and/or power supply to the devices.

    摘要翻译: 公开了一种半导体器件测试系统。 在一个实施例中,测试系统被配置为通过并行布线路径电连接到多个待测器件的接触引脚。 所述测试系统具有布置在所述布线路径中的至少一个信号分配矩阵,以提供用于测试和/或向所述设备供电的信号。

    Test method, integrated circuit and test system
    17.
    发明申请
    Test method, integrated circuit and test system 失效
    测试方法,集成电路和测试系统

    公开(公告)号:US20080288835A1

    公开(公告)日:2008-11-20

    申请号:US12050706

    申请日:2008-03-18

    IPC分类号: G11C29/08 G06F11/26

    摘要: The test method, integrated circuit and test system embodiments disclosed herein relate to testing at least one integrated circuit which uses an internal operating clock and has a first number of address pins, a second number of command pins and an address generation circuit which receives at least one encoded address information item using a third number of the address pins, which is smaller than the first number, and provides the other address pins as a fourth number of free address pins, where at least one first command is transferred using the command pins and at least one second command is transferred using at least one portion of the fourth number of the address pins from a test apparatus to the integrated circuit using a test clock which has a lower rate than the internal operating clock.

    摘要翻译: 本文公开的测试方法,集成电路和测试系统实施例涉及测试至少一个集成电路,其使用内部操作时钟并具有第一数量的地址引脚,第二数量的命令引脚和至少接收到的地址产生电路 一个编码的地址信息项,其使用小于第一个数字的第三个地址引脚数,并将另一个地址引脚提供为第四个空闲地址引脚,其中使用命令引脚传送至少一个第一命令, 使用具有比内部操作时钟更低的速率的测试时钟,使用第四数量的地址引脚的至少一部分从测试装置传输到集成电路的至少一个第二命令。

    Semiconductor Memory Device with Temperature Control
    18.
    发明申请
    Semiconductor Memory Device with Temperature Control 有权
    具有温度控制的半导体存储器件

    公开(公告)号:US20080247252A1

    公开(公告)日:2008-10-09

    申请号:US11696777

    申请日:2007-04-05

    IPC分类号: G11C7/00 G11C5/14 G11C8/00

    CPC分类号: G11C7/04 G11C5/14 G11C5/143

    摘要: A memory device in a semiconductor substrate includes at least one temperature sensor to provide a temperature dependent signal and at least one circuit to dissipate heat in response to a control signal. A control circuit is coupled to the at least one circuit and is operable to generate the control signal in response to the temperature dependent signal.

    摘要翻译: 半导体衬底中的存储器件包括至少一个温度传感器以提供与温度相关的信号,以及响应于控制信号而散热的至少一个电路。 控制电路耦合到所述至少一个电路,并且可操作以响应于与温度相关的信号而产生控制信号。

    Backwards-compatible memory module
    20.
    发明申请

    公开(公告)号:US20050270891A1

    公开(公告)日:2005-12-08

    申请号:US11127536

    申请日:2005-05-12

    摘要: Memory module (1, 101, 201) having: at least one memory cell array (6, 106, 206), with the memory cells each being addressable by at least one address and being organized in organization units comprising a predetermined number of memory cells which can be driven jointly and at the same time; a clocked read/write control device (11, 111, 211), which is clocked with a first clock signal (CLK1) and which is coupled to the memory cell array (6, 106, 206), for writing data to and reading data from the memory cells as a function of address signals (ADR); a prefetch register unit (13, 113, 213), which is coupled to the read/write control device (11, 111, 211), for initial storage of data which is read from the memory cell array (6, 106, 206) and having two or more prefetch registers (14-17, 114-117, 214-217), whose respective register size corresponds to the predetermined number of memory cells in the organization units; a controlled switching device (23, 123, 223), which is coupled to the prefetch register unit (13, 113, 213), for outputting the data (DQs) which is initially stored in the prefetch registers (14-17, 114-117, 214-217) at data inputs/outputs (5, 105, 205) of the memory module (1, 101, 201), with the switching device (23, 123, 223) successively coupling the prefetch registers (14-17, 114-117, 214-217) to the data inputs/outputs (5, 105, 205) of the memory module (1, 101, 201) in a first operating mode of the memory module (1, 101, 201), controlled by a second clock signal (CLK2), with the number of data inputs/outputs (5, 105, 205) corresponding to the number of memory cells in the organization units, and coupling at least one of the prefetch registers (14-17, 114-117, 214-217) to the data inputs/outputs (5, 105, 205) of the memory module (1, 101, 201) in a second operating mode controlled by at least one of the address signals (ADR).