公开(公告)号：US20240161957A1

公开(公告)日：2024-05-16

申请号：US18498128

申请日：2023-10-31

Applicant: PHOENIX PIONEER TECHNOLOGY CO., LTD.

Inventor： Pao-Hung CHOU ,  Shih-Ping HSU ,  Chu-Chin HU

IPC: H01F17/00 ,  H01F27/40 ,  H01F41/04

CPC classification number: H01F17/0006 ,  H01F27/40 ,  H01F41/041 ,  H01F2017/0066 ,  H01F2017/0073 ,  H01L24/16 ,  H01L28/10 ,  H01L2224/16227

Abstract: Provided is an inductor structure and manufacturing method thereof, including forming an inductance coil in a semiconductor packaging carrier plate and disposing a patterned magnetic conductive layer in the inductance coil. Therefore, a patterned build-up wiring method is used to form a magnetic material in the carrier plate, thereby improving electrical characteristics of the inductor.

公开(公告)号：US20240145155A1

公开(公告)日：2024-05-02

申请号：US18499111

申请日：2023-10-31

Applicant: PHOENIX PIONEER TECHNOLOGY CO., LTD.

Inventor： Pao-Hung CHOU ,  Che-Wei HSU ,  Shih-Ping HSU

IPC: H01F27/26 ,  H01F41/18 ,  H01F41/26

CPC classification number: H01F27/263 ,  H01F41/18 ,  H01F41/26 ,  H01L28/10

Abstract: Provided is a core structure of an inductor element. The manufacturing method thereof is to embed a magnetic conductor including at least one magnetic conductive layer in a core body and to from a plurality of apertures for passing coils around the magnetic conductor in the core body. Accordingly, the magnetic conductor is designed in the core body by using the integrated circuit carrier board manufacturing process, such that the overall size and thickness of the inductor element can be greatly reduced, thereby facilitating product miniaturization using the inductor element.

公开(公告)号：US20240055274A1

公开(公告)日：2024-02-15

申请号：US18450167

申请日：2023-08-15

Applicant: PHOENIX PIONEER TECHNOLOGY CO., LTD.

Inventor： Pao-Hung CHOU ,  Ming-Yeh CHANG

IPC: H01L21/48 ,  H01L21/56 ,  H01L21/683 ,  H01L23/498

CPC classification number: H01L21/4857 ,  H01L21/561 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/49822 ,  H01L2221/68345

Abstract: A semiconductor package carrier board structure includes a plurality of carrier board bodies and a plurality of supporting bumps. The carrier board body includes a build-up circuit structure and a plurality of conductive blocks bonded to the build-up circuit structure. Adjacent ones of the carrier board bodies are connected to each other with their corresponding conductive blocks. An area formed by the adjacent conductive blocks defines a cutting path. An opening is formed on a surface of each of the conductive blocks at the cutting path. The supporting bumps are erected between the adjacent openings. As such, each of the supporting bumps corresponds to a position overlapping the cutting path to provide the support function of the semiconductor package carrier board structure when performing the semiconductor packaging operation. After performing the singulation operation, the supporting bumps can be completely removed and one side of the openings can be exposed.

公开(公告)号：US20160055403A1

公开(公告)日：2016-02-25

申请号：US14515003

申请日：2014-10-15

Applicant: PHOENIX PIONEER TECHNOLOGY CO., LTD.

Inventor： Pao-Hung CHOU

IPC: G06K19/06 ,  G06K1/12

CPC classification number: G06K19/06037 ,  G06K1/12 ,  G06K19/0614

Abstract: A method of manufacturing a substrate structure is disclosed, including: providing a carrier board having a first surface; and forming a circuit layer and metallic lines on the first surface. The metallic lines and the carrier board constitute a two dimensional code, thereby eliminating the need to form 2D codes by laser or inkjet after the substrate structure is manufactured. Therefore, the method is simplified, and the substrate structure has a reduced cost. The present invention further provides the substrate structure.

Abstract translation: 公开了一种制造衬底结构的方法，包括：提供具有第一表面的载体板; 以及在第一表面上形成电路层和金属线。 金属线和载板构成二维码，从而消除了在制造衬底结构之后通过激光或喷墨形成2D码的需要。 因此，简化了该方法，并且基板结构具有降低的成本。 本发明还提供了基板结构。

公开(公告)号：US20160037634A1

公开(公告)日：2016-02-04

申请号：US14514981

申请日：2014-10-15

Applicant: PHOENIX PIONEER TECHNOLOGY CO., LTD.

Inventor： Pao-Hung CHOU

IPC: H05K1/11 ,  H05K3/46 ,  H05K3/00 ,  H01L23/498 ,  H01L21/48

CPC classification number: H01L21/4857 ,  H01L23/13 ,  H01L23/49811 ,  H01L23/49822 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2924/15311 ,  H01L2924/181 ,  H05K3/4007 ,  H05K3/4682 ,  H05K2201/10378 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A method of fabricating an interposer substrate provides a carrier having a first wiring layer. The first wiring layer has a plurality of first conductive pillars. A first insulating layer is formed on the carrier. The first conductive pillars are exposed from the first insulating layer. External connection pillars are formed above the first conductive pillars and electrically connected to the first conductive pillars. Then the carrier is removed. The process of fabricating the via can be bypassed in the process by forming a coreless interposer substrate on the carrier, such that the overall cost of the process can be decreased, and the process is simple. The interposer substrate is also provided.

Abstract translation: 制造中介衬底的方法提供了具有第一布线层的载体。 第一布线层具有多个第一导电柱。 在载体上形成第一绝缘层。 第一导电柱从第一绝缘层露出。 外部连接柱形成在第一导电柱之上并电连接到第一导电柱。 然后卸下载体。 在该过程中可以通过在载体上形成无芯插入器基板来绕过通孔的制造过程，从而可以降低整个工艺成本，并且工艺简单。 还提供了插入器基板。