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1.发明公开公开(公告)号：US20240222140A1
公开(公告)日：2024-07-04
申请号：US18393823
申请日：2023-12-22
发明人： Che-Wei HSU , Pao-Hung CHOU , Shih-Ping HSU
IPC分类号： H01L21/48 , H01L21/283 , H01L23/00 , H01L23/538
CPC分类号： H01L21/4857 , H01L21/283 , H01L23/5389 , H01L24/13 , H01L24/29 , H01L24/73 , H01L2224/13025 , H01L2224/13147 , H01L2224/29009 , H01L2224/29025 , H01L2224/73103 , H01L2924/18162
摘要： A package carrier board includes a first circuit build-up structure, a patterned magnetic conductive metal layer, a plurality of first conductive pillar, a second insulating layer, and a second circuit build-up structure. The patterned magnetic conductive metal layer is disposed above the first circuit build-up structure, and the cross-sectional pattern of the patterned magnetic conductive metal layer is L-shaped and/or U-shaped. The first conductive pillars are disposed on the first circuit build-up structure and located outside of the patterned magnetic conductive metal layer. The second insulating layer covers the patterned magnetic conductive metal layer and the first conductive pillars. The second circuit build-up structure is disposed on the second insulating layer. The first circuit build-up structure, the first conductive pillars, the second insulating layer, and the second circuit build-up structure are combined to form an inductive circuit structure. Additionally, a manufacturing method for the package carrier board is also disclosed.
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公开(公告)号：US20240128005A1
公开(公告)日：2024-04-18
申请号：US18463542
申请日：2023-09-08
发明人： Shih-Ping Hsu
CPC分类号： H01F17/0013 , C23C18/54 , C25D5/022 , C25D7/123 , H01F27/24 , H01F41/041
摘要： The invention provides an electronic device and its manufacturing method. The electronic device includes a first conductive component, which includes a first seed layer, a first conductive layer, a first conductive thickening layer, and a first insulating layer. The first seed layer has a plurality of first seed blocks. The first conductive layer has a plurality of first conductive blocks. Each of the first conductive blocks is disposed on a top surface of the first seed block, respectively. The first conductive thickening layer has a plurality of first conductive thickened blocks, which covers one side surface of each first seed block and one side surface of each first conductive block respectively. The first insulating layer covers the first seed layer, the first conductive layer, and the first conductive thickening layer.
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公开(公告)号：US11791281B2
公开(公告)日：2023-10-17
申请号：US16824425
申请日：2020-03-19
发明人： You-Lung Yen , Pao-Hung Chou , Chun-Hsien Yu
IPC分类号： H01L23/00 , H01L23/31 , H01L23/14 , H01L23/498 , H01L21/48 , H01L21/56 , H01L21/683
CPC分类号： H01L23/562 , H01L21/4853 , H01L21/565 , H01L21/6835 , H01L23/145 , H01L23/3128 , H01L23/49838 , H01L24/16 , H01L2224/16227 , H01L2924/3511 , H01L2924/35121
摘要： A package substrate and method of manufacturing a package substrate and a semiconductor device package are provided. The package substrate includes a circuit layer, a molding layer and a sacrificial layer. The circuit layer includes conductive traces and conductive pads. The molding layer has an upper surface and a lower surface opposite to the upper surface, wherein the molding layer partially covers the conductive traces and the conductive pads, and first surfaces of the conductive traces and first surfaces of the conductive pads are exposed from the upper surface of the molding layer. The sacrificial layer covers the lower surface of the molding layer, second surfaces of the conductive pads.
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公开(公告)号：US11757426B2
公开(公告)日：2023-09-12
申请号：US17833086
申请日：2022-06-06
发明人： Shih-Ping Hsu , Che-Wei Hsu
CPC分类号： H03H9/1092 , H01L23/31 , H01L23/488 , H03H9/02992 , H03H9/059 , H03H9/14541 , H03H9/25 , H03H9/64
摘要： A surface acoustic wave (SAW) filter package structure includes a dielectric substrate having a dielectric layer, a first patterned conductive layer, a second patterned conductive layer, and a conductive connection layer. The conductive connection layer is electrically connected between the first patterned conductive layer and the second patterned conductive layer, which are disposed at opposite sides of the dielectric layer. The second patterned conductive layer has a finger electrode portion. An active surface of a chip is faced toward the finger electrode portion. A polymer sealing frame is disposed between the chip and the dielectric substrate and surrounds the periphery of the chip to form a chamber together with the chip and the dielectric substrate. The mold sealing layer is disposed on the dielectric substrate and covers the chip and the polymer sealing frame. A manufacturing method of the SAW filter package structure is also disclosed.
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公开(公告)号：US11749619B2
公开(公告)日：2023-09-05
申请号：US16824425
申请日：2020-03-19
发明人： You-Lung Yen , Pao-Hung Chou , Chun-Hsien Yu
IPC分类号： H01L23/00 , H01L23/31 , H01L23/14 , H01L23/498 , H01L21/48 , H01L21/56 , H01L21/683
CPC分类号： H01L23/562 , H01L21/4853 , H01L21/565 , H01L21/6835 , H01L23/145 , H01L23/3128 , H01L23/49838 , H01L24/16 , H01L2224/16227 , H01L2924/3511 , H01L2924/35121
摘要： A package substrate and method of manufacturing a package substrate and a semiconductor device package are provided. The package substrate includes a circuit layer, a molding layer and a sacrificial layer. The circuit layer includes conductive traces and conductive pads. The molding layer has an upper surface and a lower surface opposite to the upper surface, wherein the molding layer partially covers the conductive traces and the conductive pads, and first surfaces of the conductive traces and first surfaces of the conductive pads are exposed from the upper surface of the molding layer. The sacrificial layer covers the lower surface of the molding layer, second surfaces of the conductive pads.
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公开(公告)号：US11658104B2
公开(公告)日：2023-05-23
申请号：US17679245
申请日：2022-02-24
发明人： Shih-Ping Hsu , Chu-Chin Hu , Pao-Hung Chou
CPC分类号： H01L23/49822 , H01L21/486 , H01L21/4857 , H01L23/49816 , H01L23/49833 , H01L23/49838 , H01L23/49866 , H05K1/0271 , H05K1/116 , H05K3/424 , H05K3/429 , H05K3/4682 , H01L21/563 , H01L24/16 , H01L2224/16235 , H01L2924/3511
摘要： An intermediate substrate is provided with a plurality of conductive posts and support members arranged at opposite sides of a coreless circuit structure and insulating layers encapsulating the conductive posts and the support members. Through the arrangement of the support members and the insulating layers, the intermediate substrate can meet the rigidity requirement so as to effectively resist warping and achieve an application of fine-pitch circuits.
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公开(公告)号：US11488911B2
公开(公告)日：2022-11-01
申请号：US16049893
申请日：2018-07-31
发明人： Chu-Chin Hu , Shih-Ping Hsu
IPC分类号： H01L23/00 , H01L23/31 , H01L23/498
摘要： A flip-chip package substrate is provided. A strengthening structure is provided on one side of a circuit structure to increase the rigidity of the flip-chip package substrate. When the flip-chip package substrate is used in large-scale packaging, the flip-chip package substrate can have good rigidity, so that the electronic package can be prevented from warping.
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公开(公告)号：US20220328613A1
公开(公告)日：2022-10-13
申请号：US17686744
申请日：2022-03-04
发明人： Pao-Hung Chou , Chun-Hsien Yu , Shih-Ping Hsu
IPC分类号： H01L49/02 , H01L23/498 , H01L23/552 , H01L23/64
摘要： An inductance structure is provided and includes a plurality of inductance traces embedded in an insulating body and at least one shielding layer that is embedded in the insulating body and free from being electrically connected to the inductance traces. The shielding layer has a plurality of line segments that are free from being connected to one another. The shielding layer shields the inductance traces to improve the inductance value and quality factor.
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公开(公告)号：US20220165674A1
公开(公告)日：2022-05-26
申请号：US17527226
申请日：2021-11-16
发明人： Che-Wei Hsu
IPC分类号： H01L23/538 , H01L25/00 , H01L23/00
摘要： The present invention provides a semiconductor package structure including a first stacked structure and a second stacked structure, which is stacked on the first stacked structure. The first stacked structure includes a first dielectric layer, a first power chip, a first conductive connecting element, a first conductive pillar and a first patterned conductive layer. The second stacked structure includes a second dielectric layer, a second power chip, a second conductive connecting element, a second conductive pillar, a second patterned conductive layer, and a third patterned conductive layer. The first power chip and the second power chip are stacked to provide a smaller volume semiconductor package structure, that the first power chip and the second power chip may be directly electrically connected through the circuit structure and may eliminate the related disadvantages of the lead frame. In addition, a manufacturing method of a semiconductor package structure is also disclosed.
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公开(公告)号：US11246223B2
公开(公告)日：2022-02-08
申请号：US15651073
申请日：2017-07-17
发明人： Shih-Ping Hsu
摘要： A package apparatus comprises a first wiring layer, a first dielectric material layer, a first conductive pillar layer, a first buffer layer, a second wiring layer, and a protection layer. The first wiring layer has a first surface and a second surface opposite to the first surface. The first dielectric material layer is disposed within partial zone of the first wiring layer. The first conductive pillar layer is disposed on the second surface of the first wiring layer. The first buffer layer is disposed within partial zone of the first conductive pillar layer. The second wiring layer is disposed on the first buffer layer and one end of the first conductive pillar layer. The protection layer is disposed on the first buffer layer and the second wiring layer.
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