Error correction for flash memory
    11.
    发明授权
    Error correction for flash memory 有权
    闪存的错误更正

    公开(公告)号:US09280421B2

    公开(公告)日:2016-03-08

    申请号:US13616379

    申请日:2012-09-14

    IPC分类号: G06F11/00 G06F11/10 G11C29/04

    CPC分类号: G06F11/1072 G11C2029/0411

    摘要: Providing for single and multi-bit error correction of electronic memory is described herein. As an example, error correction can be accomplished by establishing a suspect region between bit level distributions of a set of analyzed memory cells. The suspect region can define potential error bits for the distributions. If a bit error is detected for the distributions, error correction can first be applied to the potential error bits in the suspect region. By identifying suspected error bits and limiting initial error correction to such identified bits, complexities involved in applying error correction to all bits of the distributions can be mitigated or avoided, improving efficiency of bit error corrections for electronic memory.

    摘要翻译: 本文描述了提供电子存储器的单位和多位纠错。 作为示例,可以通过在一组分析的存储器单元的位级分布之间建立可疑区域来实现纠错。 可疑区域可以定义分布的潜在错误位。 如果对于分布检测到位错误,则可以首先将错误校正应用于可疑区域中的潜在错误位。 通过识别怀疑的错误位并将初始误差修正限制在这种识别的位上,可以减轻或避免对分布的所有位应用纠错所涉及的复杂性,从而提高电子存储器误码校正的效率。

    Cache auto-flush in a solid state memory device
    12.
    发明授权
    Cache auto-flush in a solid state memory device 有权
    在固态存储设备中缓存自动刷新

    公开(公告)号:US08271737B2

    公开(公告)日:2012-09-18

    申请号:US12473081

    申请日:2009-05-27

    IPC分类号: G06F13/00

    摘要: A device, system and method in which data in a write cache, that must at some point be written to non-volatile memory, is written to non-volatile memory after expiration of a threshold time period during which no new host commands are received. If either the last dirty entry is written back or a host command is received during the write-back process, the time threshold time period and auto-flush process is restarted.

    摘要翻译: 在其中没有接收到新的主机命令的阈值时间段期满之后,将写入高速缓存中必须在某点被写入非易失性存储器的数据写入非易失性存储器的设备,系统和方法。 如果在回写过程中回写最后一个脏条目或接收到主机命令,则会重新启动时间阈值时间段和自动刷新过程。

    Minimum equalization error based channel estimator
    13.
    发明授权
    Minimum equalization error based channel estimator 有权
    基于最小均衡误差的信道估计器

    公开(公告)号:US07251273B2

    公开(公告)日:2007-07-31

    申请号:US10367865

    申请日:2003-02-19

    IPC分类号: H03H7/30

    摘要: A channel estimator, configured for supplying equalization coefficients to a frequency equalizer, is configured for determining equalizer coefficients for a received wireless signal based on a minimum equalization error-based estimation. The channel estimator is configured for identifying first and second long preambles from the received wireless signal, determining an equalization coefficient for a selected frequency based on a minimized cost function for the first and second long preambles relative to a prescribed preamble value for the selected frequency, and supplying the equalization coefficient for the selected frequency to a frequency equalizer for equalization of the received wireless signal.

    摘要翻译: 配置用于向频率均衡器提供均衡系数的信道估计器被配置用于基于最小均衡误差估计来确定所接收的无线信号的均衡器系数。 信道估计器被配置用于从接收的无线信号识别第一和第二长前导码,基于针对所选频率的规定前导码,基于用于第一和第二长前导码的最小化成本函数来确定所选频率的均衡系数, 并将所选择的频率的均衡系数提供给频率均衡器,以便均衡所接收的无线信号。

    Superconducting article and method of forming a superconducting article
    14.
    发明申请
    Superconducting article and method of forming a superconducting article 失效
    超导制品及形成超导制品的方法

    公开(公告)号:US20070148330A1

    公开(公告)日:2007-06-28

    申请号:US11320104

    申请日:2005-12-28

    IPC分类号: B05D5/12 H01L39/24

    摘要: A superconducting article and a method of making a superconducting article is described. The method of forming a superconducting article includes providing a substrate, forming a buffer layer to overlie the substrate, the buffer layer including a first buffer film deposited in the presence of an ion beam assist source and having a uniaxial crystal texture. The method further includes forming a superconducting layer to overlie the buffer layer.

    摘要翻译: 描述超导制品和制造超导制品的方法。 形成超导体的方法包括提供衬底,形成覆盖在衬底上的缓冲层,缓冲层包括在离子束辅助源存在下沉积并具有单轴晶体结构的第一缓冲膜。 该方法还包括形成覆盖缓冲层的超导层。

    CACHE AUTO-FLUSH IN A SOLID STATE MEMORY DEVICE
    15.
    发明申请
    CACHE AUTO-FLUSH IN A SOLID STATE MEMORY DEVICE 有权
    高速缓存在固态存储器中自动闪存

    公开(公告)号:US20100306448A1

    公开(公告)日:2010-12-02

    申请号:US12473081

    申请日:2009-05-27

    IPC分类号: G06F12/00 G06F12/02

    摘要: A device, system and method in which data in a write cache, that must at some point be written to non-volatile memory, is written to non-volatile memory after expiration of a threshold time period during which no new host commands are received. If either the last dirty entry is written back or a host command is received during the write-back process, the time threshold time period and auto-flush process is restarted.

    摘要翻译: 在其中没有接收到新的主机命令的阈值时间段期满之后,将写入高速缓存中必须在某点被写入非易失性存储器的数据写入非易失性存储器的设备,系统和方法。 如果在回写过程中回写最后一个脏条目或接收到主机命令,则会重新启动时间阈值时间段和自动刷新过程。

    Power safe translation table operation in flash memory
    16.
    发明授权
    Power safe translation table operation in flash memory 有权
    闪存中的电源安全转换表操作

    公开(公告)号:US07761740B2

    公开(公告)日:2010-07-20

    申请号:US11955934

    申请日:2007-12-13

    IPC分类号: G06F11/00

    摘要: Systems and/or methods that provide for the accuracy of address translations in a memory system that decouples the system address from the physical address. Address-modifying transactions are recorded in a non-volatile write buffer to couple the last-in-time translation physical address/location with the current translated physical location/address. In addition, integrity check protection may be applied to the translation and to the written data to limit the amount of data that may be lost in the event of a failure/error occurring during the write operation. Transaction recording and integrity check protection allows for recovery of write operations that may not have fully completed due to the failure/error.

    摘要翻译: 提供将系统地址与物理地址分离的存储器系统中的地址转换的准确性的系统和/或方法。 地址修改事务被记录在非易失性写入缓冲器中以将时间转换的物理地址/位置与当前翻译的物理位置/地址耦合。 此外,完整性检查保护可以应用于转换和写入数据,以限制在写入操作期间发生故障/错误的情况下可能丢失的数据量。 事务记录和完整性检查保护允许恢复由于故障/错误而可能未完全完成的写入操作。

    POWER SAFE TRANSLATION TABLE OPERATION IN FLASH MEMORY
    17.
    发明申请
    POWER SAFE TRANSLATION TABLE OPERATION IN FLASH MEMORY 有权
    电源安全转换表在闪存中的操作

    公开(公告)号:US20090158085A1

    公开(公告)日:2009-06-18

    申请号:US11955934

    申请日:2007-12-13

    IPC分类号: G06F12/16 G06F12/10 G06F11/10

    摘要: Systems and/or methods that provide for the accuracy of address translations in a memory system that decouples the system address from the physical address. Address-modifying transactions are recorded in a non-volatile write buffer to couple the last-in-time translation physical address/location with the current translated physical location/address. In addition, integrity check protection may be applied to the translation and to the written data to limit the amount of data that may be lost in the event of a failure/error occurring during the write operation. Transaction recording and integrity check protection allows for recovery of write operations that may not have fully completed due to the failure/error.

    摘要翻译: 提供将系统地址与物理地址分离的存储器系统中的地址转换的准确性的系统和/或方法。 地址修改事务被记录在非易失性写入缓冲器中以将时间转换的物理地址/位置与当前翻译的物理位置/地址耦合。 此外,完整性检查保护可以应用于转换和写入数据,以限制在写入操作期间发生故障/错误的情况下可能丢失的数据量。 事务记录和完整性检查保护允许恢复由于故障/错误而可能未完全完成的写入操作。

    ERROR CORRECTION FOR FLASH MEMORY
    18.
    发明申请
    ERROR CORRECTION FOR FLASH MEMORY 有权
    FLASH存储器的错误校正

    公开(公告)号:US20130024742A1

    公开(公告)日:2013-01-24

    申请号:US13616379

    申请日:2012-09-14

    IPC分类号: H03M13/29

    CPC分类号: G06F11/1072 G11C2029/0411

    摘要: Providing for single and multi-bit error correction of electronic memory is described herein. As an example, error correction can be accomplished by establishing a suspect region between bit level distributions of a set of analyzed memory cells. The suspect region can define potential error bits for the distributions. If a bit error is detected for the distributions, error correction can first be applied to the potential error bits in the suspect region. By identifying suspected error bits and limiting initial error correction to such identified bits, complexities involved in applying error correction to all bits of the distributions can be mitigated or avoided, improving efficiency of bit error corrections for electronic memory.

    摘要翻译: 本文描述了提供电子存储器的单位和多位纠错。 作为示例,可以通过在一组分析的存储器单元的位级分布之间建立可疑区域来实现纠错。 可疑区域可以定义分布的潜在错误位。 如果对于分布检测到位错误,则可以首先将错误校正应用于可疑区域中的潜在错误位。 通过识别怀疑的错误位并将初始误差修正限制在这种识别的位上,可以减轻或避免对分布的所有位应用纠错所涉及的复杂性,从而提高电子存储器误码校正的效率。

    Channel tracking using step size based on norm-1 based errors across multiple OFDM symbols
    19.
    发明授权
    Channel tracking using step size based on norm-1 based errors across multiple OFDM symbols 有权
    使用基于在多个OFDM符号上的基于范数-1的误差的步长的信道跟踪

    公开(公告)号:US07362812B1

    公开(公告)日:2008-04-22

    申请号:US10839265

    申请日:2004-05-06

    申请人: Ping Hou Yong Li

    发明人: Ping Hou Yong Li

    IPC分类号: H04K1/10

    摘要: A channel tracking module, configured for generating updated equalization coefficients for a frequency equalizer, is configured for determining a digital-based error value between equalized signals output by the frequency equalizer relative to predicted signals, for each subcarrier frequency of an OFDM symbol. The channel tracking module determines an accumulated error based on accumulating the digital-based error values for all the subcarrier frequencies of the OFDM symbol, for a prescribed successive number of OFDM symbols. The channel tracking module also determines a step size based on the accumulated error and relative to a prescribed step function configured for optimizing equalizer adjustments within stability limits. The channel tracking updates the equalization coefficients for each subscarrier frequency based on the accumulated error and the step size. Hence, the channel tracking module can be implemented in an economical manner while ensuring optimum equalizer adjustments within stability limits that ensure convergence of the equalization coefficients.

    摘要翻译: 配置用于生成用于频率均衡器的更新的均衡系数的信道跟踪模块被配置为针对OFDM符号的每个子载波频率,确定由频率均衡器相对于预测信号输出的均衡信号之间的基于数字的误差值。 信道跟踪模块基于为OFDM符号的规定的连续数量的OFDM符号的所有副载波频率累积基于数字的误差值来确定累积误差。 信道跟踪模块还基于累积误差并且相对于配置用于在稳定限度内优化均衡器调整的规定步长函数来确定步长。 信道跟踪基于累积误差和步长来更新每个子载波频率的均衡系数。 因此,可以以经济的方式实现信道跟踪模块,同时确保在确定均衡系数的收敛的稳定性限制内的最佳均衡器调整。