公开(公告)号：US20220301805A1

公开(公告)日：2022-09-22

申请号：US17701298

申请日：2022-03-22

Applicant: Purdue Research Foundation

Inventor： Saeed Mohammadi ,  Shabnam Ghotbi

IPC: H01J21/20

Abstract: A field emitter array (FEA) vacuum transistor is disclosed which includes a substrate and a plurality of nanorods formed of a first polarity dopant on the substrate, wherein the dopant density is between about 1013 cm−3 to about 1015 cm−3.

公开(公告)号：US09188563B2

公开(公告)日：2015-11-17

申请号：US14497864

申请日：2014-09-26

Applicant: Purdue Research Foundation

Inventor： Saeed Mohammadi ,  Mojgan Sarmadi ,  Hossein Pajouhi

IPC: G01N27/414 ,  G01N33/487

CPC classification number: G01N27/4145 ,  G01N33/48721

Abstract: A perforated metal oxide semiconductor (MOS) structure for single biomolecule, virus, or single cell detection is disclosed. The structure includes a nanochannel formed through a sensing region configured to allow a solution containing particles to pass through the perforated MOS sensor. First and second terminals are configured to measure electrical parameters representative of change of electrical characteristics of the solution as the particle passes through the perforated MOS structure.

Abstract translation: 公开了用于单一生物分子，病毒或单细胞检测的穿孔金属氧化物半导体（MOS）结构。 该结构包括通过感测区域形成的纳米通道，其被配置为允许含有颗粒的溶液通过穿孔的MOS传感器。 第一和第二端子被配置为测量代表当颗粒通过穿孔的MOS结构时溶液的电特性变化的电参数。

公开(公告)号：US20130307626A1

公开(公告)日：2013-11-21

申请号：US13797111

申请日：2013-03-12

Applicant: Purdue Research Foundation

Inventor： Saeed Mohammadi ,  Sultan R. Helmi ,  Jing-Hwa Chen ,  Hossein Pajouhi

IPC: H01L21/02 ,  H03F3/21

CPC classification number: H01L21/0254 ,  H01L27/1203 ,  H03F1/0272 ,  H03F3/21 ,  H03F3/426 ,  H03F3/45179 ,  H03F2200/537 ,  H03F2203/45394 ,  H03F2203/45731

Abstract: Illustrative embodiments of power amplifiers and associated methods are disclosed. In at least one embodiment, a method may include fabricating a power amplifier in a first silicon layer of a silicon-on-insulator (SOI) substrate, wherein the SOI substrate comprises the first silicon layer, a second silicon layer, and a buried oxide layer disposed between the first and second silicon layers; removing at least some of the second silicon layer from the SOI substrate, after fabricating the power amplifier; and securing the SOI substrate, after removing at least some of the second silicon layer, to an electrically non-conductive and thermally conductive substrate.

Abstract translation: 公开了功率放大器和相关方法的说明性实施例。 在至少一个实施例中，一种方法可以包括在绝缘体上硅（SOI）衬底的第一硅层中制造功率放大器，其中SOI衬底包括第一硅层，第二硅层和掩埋氧化物 层，设置在第一和第二硅层之间; 在制造功率放大器之后，从SOI衬底去除至少一些第二硅层; 以及在将至少一些所述第二硅层去除之后将所述SOI衬底固定到非导电和导热的基底上。

公开(公告)号：US20130120065A1

公开(公告)日：2013-05-16

申请号：US13733889

申请日：2013-01-04

Applicant: Purdue Research Foundation

Inventor： Saeed Mohammadi ,  Sultan R. Helmi ,  Jing-Hwa Chen ,  Andrew J. Robison

IPC: H03F3/16

CPC classification number: H03F3/426 ,  H01L27/1203 ,  H03F1/0272 ,  H03F3/21 ,  H03F3/45179 ,  H03F2200/537 ,  H03F2203/45394 ,  H03F2203/45731

Abstract: Illustrative embodiments of power amplifiers are disclosed. In one embodiment, a power amplifier includes a plurality of transistors formed on a silicon-on-insulator (SOI) substrate such that the plurality of transistors are each electrically isolated from one another within the SOI substrate. The power amplifier also includes a plurality of biasing networks, each biasing network being configured to dynamically bias at least one of the plurality of transistors. The plurality of transistors are electrically coupled in a series stack, with an output of the power amplifier being provided across the series stack.

Abstract translation: 公开了功率放大器的说明性实施例。 在一个实施例中，功率放大器包括形成在绝缘体上硅（SOI）衬底上的多个晶体管，使得多个晶体管在SOI衬底内彼此电隔离。 功率放大器还包括多个偏置网络，每个偏置网络被配置为动态地偏置多个晶体管中的至少一个。 多个晶体管以串联堆叠电耦合，功率放大器的输出跨越串联堆叠提供。