-
公开(公告)号:US20130307626A1
公开(公告)日:2013-11-21
申请号:US13797111
申请日:2013-03-12
Applicant: Purdue Research Foundation
Inventor: Saeed Mohammadi , Sultan R. Helmi , Jing-Hwa Chen , Hossein Pajouhi
CPC classification number: H01L21/0254 , H01L27/1203 , H03F1/0272 , H03F3/21 , H03F3/426 , H03F3/45179 , H03F2200/537 , H03F2203/45394 , H03F2203/45731
Abstract: Illustrative embodiments of power amplifiers and associated methods are disclosed. In at least one embodiment, a method may include fabricating a power amplifier in a first silicon layer of a silicon-on-insulator (SOI) substrate, wherein the SOI substrate comprises the first silicon layer, a second silicon layer, and a buried oxide layer disposed between the first and second silicon layers; removing at least some of the second silicon layer from the SOI substrate, after fabricating the power amplifier; and securing the SOI substrate, after removing at least some of the second silicon layer, to an electrically non-conductive and thermally conductive substrate.
Abstract translation: 公开了功率放大器和相关方法的说明性实施例。 在至少一个实施例中,一种方法可以包括在绝缘体上硅(SOI)衬底的第一硅层中制造功率放大器,其中SOI衬底包括第一硅层,第二硅层和掩埋氧化物 层,设置在第一和第二硅层之间; 在制造功率放大器之后,从SOI衬底去除至少一些第二硅层; 以及在将至少一些所述第二硅层去除之后将所述SOI衬底固定到非导电和导热的基底上。
-
公开(公告)号:US20130120065A1
公开(公告)日:2013-05-16
申请号:US13733889
申请日:2013-01-04
Applicant: Purdue Research Foundation
Inventor: Saeed Mohammadi , Sultan R. Helmi , Jing-Hwa Chen , Andrew J. Robison
IPC: H03F3/16
CPC classification number: H03F3/426 , H01L27/1203 , H03F1/0272 , H03F3/21 , H03F3/45179 , H03F2200/537 , H03F2203/45394 , H03F2203/45731
Abstract: Illustrative embodiments of power amplifiers are disclosed. In one embodiment, a power amplifier includes a plurality of transistors formed on a silicon-on-insulator (SOI) substrate such that the plurality of transistors are each electrically isolated from one another within the SOI substrate. The power amplifier also includes a plurality of biasing networks, each biasing network being configured to dynamically bias at least one of the plurality of transistors. The plurality of transistors are electrically coupled in a series stack, with an output of the power amplifier being provided across the series stack.
Abstract translation: 公开了功率放大器的说明性实施例。 在一个实施例中,功率放大器包括形成在绝缘体上硅(SOI)衬底上的多个晶体管,使得多个晶体管在SOI衬底内彼此电隔离。 功率放大器还包括多个偏置网络,每个偏置网络被配置为动态地偏置多个晶体管中的至少一个。 多个晶体管以串联堆叠电耦合,功率放大器的输出跨越串联堆叠提供。
-
公开(公告)号:US09190269B2
公开(公告)日:2015-11-17
申请号:US13797111
申请日:2013-03-12
Applicant: Purdue Research Foundation
Inventor: Saeed Mohammadi , Sultan R. Helmi , Jing-Hwa Chen , Hossein Pajouhi
CPC classification number: H01L21/0254 , H01L27/1203 , H03F1/0272 , H03F3/21 , H03F3/426 , H03F3/45179 , H03F2200/537 , H03F2203/45394 , H03F2203/45731
Abstract: Illustrative embodiments of power amplifiers and associated methods are disclosed. In at least one embodiment, a method may include fabricating a power amplifier in a first silicon layer of a silicon-on-insulator (SOI) substrate, wherein the SOI substrate comprises the first silicon layer, a second silicon layer, and a buried oxide layer disposed between the first and second silicon layers; removing at least some of the second silicon layer from the SOI substrate, after fabricating the power amplifier; and securing the SOI substrate, after removing at least some of the second silicon layer, to an electrically non-conductive and thermally conductive substrate.
Abstract translation: 公开了功率放大器和相关方法的说明性实施例。 在至少一个实施例中,一种方法可以包括在绝缘体上硅(SOI)衬底的第一硅层中制造功率放大器,其中SOI衬底包括第一硅层,第二硅层和掩埋氧化物 层,设置在第一和第二硅层之间; 在制造功率放大器之后,从SOI衬底去除至少一些第二硅层; 以及在将至少一些所述第二硅层去除之后将所述SOI衬底固定到非导电和导热的基底上。
-
公开(公告)号:US08558619B2
公开(公告)日:2013-10-15
申请号:US13733889
申请日:2013-01-04
Applicant: Purdue Research Foundation
Inventor: Saeed Mohammadi , Sultan R. Helmi , Jing-Hwa Chen , Andrew J. Robison
IPC: H03F3/16
CPC classification number: H03F3/426 , H01L27/1203 , H03F1/0272 , H03F3/21 , H03F3/45179 , H03F2200/537 , H03F2203/45394 , H03F2203/45731
Abstract: Illustrative embodiments of power amplifiers are disclosed. In one embodiment, a power amplifier includes a plurality of transistors formed on a silicon-on-insulator (SOI) substrate such that the plurality of transistors are each electrically isolated from one another within the SOI substrate. The power amplifier also includes a plurality of biasing networks, each biasing network being configured to dynamically bias at least one of the plurality of transistors. The plurality of transistors are electrically coupled in a series stack, with an output of the power amplifier being provided across the series stack.
Abstract translation: 公开了功率放大器的说明性实施例。 在一个实施例中,功率放大器包括形成在绝缘体上硅(SOI)衬底上的多个晶体管,使得多个晶体管在SOI衬底内彼此电隔离。 功率放大器还包括多个偏置网络,每个偏置网络被配置为动态地偏置多个晶体管中的至少一个。 多个晶体管以串联堆叠电耦合,功率放大器的输出跨越串联堆叠提供。
-
-
-