公开(公告)号：US20220417067A1

公开(公告)日：2022-12-29

申请号：US17852922

申请日：2022-06-29

Applicant: Rambus Inc.

Inventor： Masum Hossain ,  Richelle L. Smith ,  Carl W. Werner

IPC: H04L27/233 ,  H04L27/34 ,  H04L27/20

Abstract: A communication system comprises a transmitter and a receiver that communicate differential phase modulated data over a wireline channel pair. The transmitter encodes data symbols by generating first and second data signals with differentially phase shifted signal transitions with respect to one another. The receiver receives the first data signal and the second data signal and samples the first data signal based on a signal transition timing of the second data signal to generate a first output data symbol. The receiver furthermore samples the second data signal based on signal transition timing of the first data signal to generate a second output data symbol.

公开(公告)号：US20220014404A1

公开(公告)日：2022-01-13

申请号：US17363557

申请日：2021-06-30

Applicant: Rambus Inc.

Inventor： Masum Hossain ,  Richelle L. Smith ,  Carl W. Werner

IPC: H04L27/233 ,  H04L27/34 ,  H04L27/20

Abstract: A communication system comprises a transmitter and a receiver that communicate differential phase modulated data over a wireline channel pair. The transmitter encodes data symbols by generating first and second data signals with differentially phase shifted signal transitions with respect to one another. The receiver receives the first data signal and the second data signal and samples the first data signal based on a signal transition timing of the second data signal to generate a first output data symbol. The receiver furthermore samples the second data signal based on signal transition timing of the first data signal to generate a second output data symbol.

公开(公告)号：US10757835B2

公开(公告)日：2020-08-25

申请号：US15783949

申请日：2017-10-13

Applicant: Rambus Inc.

Inventor： Frederick A. Ware ,  Carl W. Werner

IPC: H05K7/20 ,  G06F1/20 ,  H01L27/108 ,  G06F1/18 ,  H01B7/29 ,  H01B7/04 ,  H01L23/522 ,  H01L23/532 ,  H01L23/367 ,  H01L23/498 ,  H01B3/12 ,  H01B1/02 ,  H01L23/538

Abstract: The embodiments herein describe technologies of cryogenic digital systems with a first component located in a first cryogenic temperature domain and a second component located in a second cryogenic temperature domain that is lower in temperature than the first cryogenic temperature domain. An electrical conductor is coupled between the first component and the second component along a first plane. The electrical conductor carries a signal between the first component and the second component. A cooling assembly is coupled to a segment of the electrical conductor. The cooling assembly may include an electrical insulator including ceramic material. The cooling assembly may include a cold plate, two cold plates, or an orthogonal cold strip.

公开(公告)号：US10734971B2

公开(公告)日：2020-08-04

申请号：US16276677

申请日：2019-02-15

Applicant: Rambus Inc.

Inventor： Masum Hossain ,  Carl W. Werner

IPC: H03H11/12 ,  H04B1/04 ,  H04B1/58 ,  H04B1/10

Abstract: Disclosed is receiver for a noise limited system. A front-end circuit amplifies and band-limits an incoming signal. The amplification increases the signal swing but introduces both thermal and flicker noise. A low-pass band limitation reduces the thermal noise component present at frequencies above what is necessary for correctly receiving the transmitted symbols. This band limited signal is provided to the integrator circuit. The output of the integrator is equalized to reduce the effects of inter-symbol interference and then sampled. The samples are used to apply low frequency equalization (i.e., in response to long and/or unbalanced strings of symbols) to mitigate the effects of DC wander caused by mismatches between the number of symbols of each kind being received.

公开(公告)号：US10516442B2

公开(公告)日：2019-12-24

申请号：US15890341

申请日：2018-02-06

Applicant: Rambus Inc.

Inventor： John W. Poulton ,  Frederick A. Ware ,  Carl W. Werner

IPC: H04B10/50 ,  H04B3/56 ,  H04L25/02 ,  G06F13/40 ,  H04B3/54 ,  H03F3/24 ,  H04B10/40 ,  H04B10/073 ,  H04B1/04

Abstract: A single-ended data transmission system transmits a signal having a signal voltage that is referenced to a power supply voltage and that swings above and below the power supply voltage. The power supply voltage is coupled to a power supply rail that also serves as a signal return path. The signal voltage is derived from two signal supply voltages generated by a pair of charge pumps that draw substantially same amount of current from a power supply.

公开(公告)号：US10511276B1

公开(公告)日：2019-12-17

申请号：US16043754

申请日：2018-07-24

Applicant: Rambus Inc.

Inventor： Frederick A. Ware ,  Carl W. Werner ,  John Eric Linstadt

IPC: H03F1/02 ,  H03F1/30 ,  H03F3/16 ,  H03F19/00 ,  G06N10/00

Abstract: A signal amplifier is distributed between first and second IC devices and includes a low-power input stage disposed within the first IC device, a bias-current source disposed within the second IC device and an output stage disposed within the second IC device. The output stage includes a resistance disposed within the second IC device and having a first terminal coupled to a drain terminal of a transistor within the input stage via a first signaling line that extends between the first and second IC devices.

公开(公告)号：US09923602B2

公开(公告)日：2018-03-20

申请号：US15138077

申请日：2016-04-25

Applicant: Rambus Inc.

Inventor： John W. Poulton ,  Frederick A. Ware ,  Carl W. Werner

IPC: H02H3/22 ,  H04B3/56 ,  H04L25/02 ,  G06F13/40 ,  H04B3/54 ,  H04B10/50 ,  H04B10/40 ,  H04B10/073 ,  H04B1/04

CPC classification number: H04B3/56 ,  G06F13/4072 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49109 ,  H01L2924/15311 ,  H03F3/24 ,  H04B3/54 ,  H04B10/0731 ,  H04B10/40 ,  H04B10/50 ,  H04B2001/0408 ,  H04L25/0272 ,  H01L2924/00014

Abstract: A single-ended data transmission system transmits a signal having a signal voltage that is referenced to a power supply voltage and that swings above and below the power supply voltage. The power supply voltage is coupled to a power supply rail that also serves as a signal return path. The signal voltage is derived from two signal supply voltages generated by a pair of charge pumps that draw substantially same amount of current from a power supply.

公开(公告)号：US20140323054A1

公开(公告)日：2014-10-30

申请号：US14364002

申请日：2012-12-20

Applicant: RAMBUS INC.

Inventor： Farshid Aryanfar ,  Carl W. Werner ,  Aykut Bultan

IPC: H04B7/005

CPC classification number: H04B7/005 ,  H04L25/0204

Abstract: The disclosed embodiments relate to a system that performs channel-sounding operations in a multi-antenna wireless communication system. During operation, the system first performs channel-sounding operations between a first client and a second client in a first frequency band. These channel-sounding operations involve transmitting a series of known tones between the first client and the second client and using signals received as a result of the transmissions to finds a strongest path between the first client and the second client. Next, the system uses the identified strongest path to improve channel-sounding operations in a second frequency band.

Abstract translation: 所公开的实施例涉及在多天线无线通信系统中执行信道探测操作的系统。 在操作期间，系统首先在第一频带中在第一客户端和第二客户端之间执行信道探测操作。 这些信道探测操作涉及在第一客户机和第二客户端之间传送一系列已知的音调，并使用作为传输结果而接收的信号，以在第一客户机和第二客户机之间找到最强的路径。 接下来，系统使用所识别的最强路径来改善第二频带中的频道探测操作。

公开(公告)号：US20130251084A1

公开(公告)日：2013-09-26

申请号：US13897267

申请日：2013-05-17

Applicant: Rambus Inc.

Inventor： Carl W. Werner

IPC: H04L7/033

CPC classification number: H04L7/0331 ,  H03D13/004 ,  H03L7/07 ,  H03L7/081 ,  H03L7/087 ,  H03L7/0891 ,  H03L7/091 ,  H04L7/033

Abstract: A clock recovery circuit includes a first phase detector for measuring the phase difference between a first clock signal from a voltage controlled oscillator (VCO) and a data signal. A phase shifter responsive to a control signal based on this phase difference adjusts the phase of an incoming clock signal to yield a second clock signal. The phase difference between the first clock signal and the second clock signal is measured and the resulting signal is low-pass filtered to derive a control signal for controlling the VCO. The phase locked loop including the VCO filters out jitter.

Abstract translation: 时钟恢复电路包括用于测量来自压控振荡器（VCO）的第一时钟信号与数据信号之间的相位差的第一相位检测器。 基于该相位差响应于控制信号的移相器调整输入时钟信号的相位以产生第二时钟信号。 测量第一时钟信号和第二时钟信号之间的相位差，并将所得到的信号进行低通滤波，以得到用于控制VCO的控制信号。 包括VCO的锁相环滤除抖动。

公开(公告)号：US11811379B2

公开(公告)日：2023-11-07

申请号：US17559960

申请日：2021-12-22

Applicant: Rambus Inc.

Inventor： Masum Hossain ,  Carl W. Werner

IPC: H03H11/12 ,  H04B1/04 ,  H04B1/58 ,  H04B1/10

CPC classification number: H03H11/1239 ,  H04B1/0458 ,  H04B1/109 ,  H04B1/588 ,  H04B2001/045

Abstract: Disclosed is receiver for a noise limited system. A front-end circuit amplifies and band-limits an incoming signal. The amplification increases the signal swing but introduces both thermal and flicker noise. A low-pass band limitation reduces the thermal noise component present at frequencies above what is necessary for correctly receiving the transmitted symbols. This band limited signal is provided to the integrator circuit. The output of the integrator is equalized to reduce the effects of inter-symbol interference and then sampled. The samples are used to apply low frequency equalization (i.e., in response to long and/or unbalanced strings of symbols) to mitigate the effects of DC wander caused by mismatches between the number of symbols of each kind being received.