-
公开(公告)号：US20240201894A1
公开(公告)日：2024-06-20
申请号：US18540670
申请日：2023-12-14
Applicant: Rambus Inc.
Inventor： Evan Lawrence Erickson , Christopher Haywood
IPC: G06F3/06
CPC classification number: G06F3/0656 , G06F3/0604 , G06F3/064 , G06F3/0673
Abstract: An apparatus and method for low page overhead recompression. In one embodiment a memory buffer integrated circuit (IC) device is disclosed that includes a first circuit configured to independently compress equally sized portions of a page of data, and a second circuit configured to store the compressed data portions at respective addresses in memory. The memory buffer IC device also includes a third circuit configured to store a page table comprising an entry with information related to the respective memory addresses.
-
公开(公告)号：US20240143197A1
公开(公告)日：2024-05-02
申请号：US18494641
申请日：2023-10-25
Applicant: Rambus Inc.
IPC: G06F3/06
CPC classification number: G06F3/0622 , G06F3/0608 , G06F3/064 , G06F3/0673
Abstract: Technologies for modal encryption are described. One memory buffer device includes a compression block and an in-line memory encryption (IME) block. The compression block can output compressed data. The IME block can encrypt uncompressed data at a first granularity and encrypt the compressed data at a second granularity, wherein the second granularity is larger than the first granularity.
-
公开(公告)号：US20240012565A1
公开(公告)日：2024-01-11
申请号：US18218831
申请日：2023-07-06
Applicant: Rambus Inc.
Inventor： Evan Lawrence Erickson , Christopher Haywood , Craig E. Hampel
IPC: G06F3/06
CPC classification number: G06F3/0611 , G06F3/0659 , G06F3/0673
Abstract: A buffer integrated circuit (IC) chip is disclosed. The buffer IC chip includes host interface circuitry to receive a request from at least one host. The request includes at least one command to perform a memory compression operation on first uncompressed data that is stored in a first memory region. Compression circuitry, in response to the at least one command, compresses the first uncompressed data to first compressed data. The first compressed data is transferred to a second memory region.
-
公开(公告)号：US20230401311A1
公开(公告)日：2023-12-14
申请号：US18202517
申请日：2023-05-26
Applicant: Rambus Inc.
Inventor： Evan Lawrence Erickson , Helena Handschuh , Michael Alexander Hamburg , Mark Evan Marson , Michael Raymond Miller
CPC classification number: G06F21/552 , G06F11/10
Abstract: Technologies for detecting an error using a message authentication code (MAC) associated with cache line data and differentiating the error as having been caused by an attack on memory or a MAC verification failure caused by an ECC escape. One memory buffer device includes an in-line memory encryption (IME) circuit to generate the MACs and verify the MACs. Upon a MAC verification failure, the memory buffer device can analyze at least one of the historical MAC verification failures or historical ECC-corrected errors over time to determine if the error is caused by an attack on memory.
-
公开(公告)号：US11657007B2
公开(公告)日：2023-05-23
申请号：US17333420
申请日：2021-05-28
Applicant: Rambus Inc.
Inventor： Christopher Haywood , Evan Lawrence Erickson
CPC classification number: G06F13/1668 , G06F12/023 , G06F2212/1044
Abstract: A multi-path fabric interconnected system with many nodes and many communication paths from a given source node to a given destination node. A memory allocation device on an originating node (local node) requests an allocation of memory from a remote node (i.e., requests a remote allocation). The memory allocation device on the local node selects the remote node based on one or more performance indicators. The local memory allocation device may select the remote node to provide a remote allocation of memory based on one or more of: latency, availability, multi-path bandwidth, data access patterns (both local and remote), fabric congestion, allowed bandwidth limits, maximum latency limits, and, available memory on remote node.
-
Patent Agency Ranking
公开(公告)号：US20230138817A1
公开(公告)日：2023-05-04
申请号：US17971964
申请日：2022-10-24
Applicant: Rambus Inc.
Inventor： Michael Raymond Miller , Evan Lawrence Erickson
Abstract: A multi-processor device is disclosed. The multi-processor device includes interface circuitry to receive requests from at least one host device. A primary processor is coupled to the interface circuitry to process the requests in the absence of a failure event associated with the primary processor. A secondary processor processes operations on behalf of the primary processor and selectively receives the requests from the interface circuitry based on detection of the failure event associated with the primary processor.
-
公开(公告)号：US20220237113A1
公开(公告)日：2022-07-28
申请号：US17580427
申请日：2022-01-20
Applicant: Rambus Inc.
Inventor： Steven C. Woo , Christopher Haywood , Evan Lawrence Erickson
IPC: G06F12/02 , G06F12/0811 , G06F12/0882 , G06F12/0871
Abstract: Computing devices, methods, and systems for switch-based free memory tracking in data center environments are disclosed. An exemplary switch integrated circuit (IC), which is used in a switched fabric or a network, can include a processing device and a tracking structure that is distributed with at least a second switch IC. The tracking structure tracks free memory units that are accessible in a first set of nodes by the second switch IC. The processing device receives a request for a number of free memory units. The processing device forwards the request to a node in the first set of nodes that has at least the number of free memory units or forwards the request to the second switch IC that has at least the number of free memory units or responds to the request with a response that indicates that the request could not be fulfilled.
-
公开(公告)号：US10161788B2
公开(公告)日：2018-12-25
申请号：US14677878
申请日：2015-04-02
Applicant: RAMBUS INC.
Inventor： David Geoffrey Stork , Evan Lawrence Erickson , Patrick R. Gill , James Tringali
Abstract: A sensing device projects near-field spatial modulations onto a closely spaced photodetector array. Due to physical properties of the grating, the point-spread response distributes spatial modulations over a relatively large area on the array. The spatial modulations are captured by the array, and photographs and other image information can be extracted from the resultant data. An image-change detector incorporating such a sensing device uses very little power because only a small number of active pixels are required to cover a visual field.
-
公开(公告)号：US08982598B2
公开(公告)日：2015-03-17
申请号：US13865110
申请日：2013-04-17
Applicant: Rambus Inc.
Inventor： Paul Damian Franzon , Evan Lawrence Erickson , Thomas Vogelsang , Frederick A. Ware
CPC classification number: G11C29/04 , G11C29/702 , G11C29/808
Abstract: A memory device includes a stack of circuit layers, each circuit layer having formed thereon a memory circuit configured to store data and a redundant resources circuit configured to provide redundant circuitry to correct defective circuitry on at least one memory circuit formed on at least one layer in the stack. The redundant resources circuit includes a partial bank of redundant memory cells, wherein an aggregation of the partial bank of redundant memory cells in each of the circuit layers of the stack includes at least one full bank of redundant memory cells and wherein the redundant resources circuit is configured to replace at least one defective bank of memory cells formed on any of the circuit layers in the stack with at least a portion of the partial bank of redundant memory cells formed on any of the circuit layers in the stack.
Abstract translation: 存储器件包括电路层堆叠，每个电路层上形成有存储器电路，其被配置为存储数据，冗余资源电路被配置为提供冗余电路以校正在至少一个层上形成的至少一个存储器电路上的有缺陷的电路 堆栈。 所述冗余资源电路包括冗余存储器单元的部分组，其中所述堆叠的每个电路层中的冗余存储器单元的部分组的聚集包括至少一个全部冗余存储器单元，并且其中所述冗余资源电路为 被配置为替换形成在堆叠中的任何电路层上的至少一个存储单元的至少一个有缺陷的存储单元组，其中所述冗余存储器单元的部分库的至少一部分形成在堆叠中的任何电路层上。
-
公开(公告)号：US11841793B2
公开(公告)日：2023-12-12
申请号：US17580427
申请日：2022-01-20
Applicant: Rambus Inc.
Inventor： Steven C. Woo , Christopher Haywood , Evan Lawrence Erickson
IPC: G06F12/02 , G06F12/0871 , G06F12/0882 , G06F12/0811
CPC classification number: G06F12/0238 , G06F12/0811 , G06F12/0871 , G06F12/0882
Abstract: Computing devices, methods, and systems for switch-based free memory tracking in data center environments are disclosed. An exemplary switch integrated circuit (IC), which is used in a switched fabric or a network, can include a processing device and a tracking structure that is distributed with at least a second switch IC. The tracking structure tracks free memory units that are accessible in a first set of nodes by the second switch IC. The processing device receives a request for a number of free memory units. The processing device forwards the request to a node in the first set of nodes that has at least the number of free memory units or forwards the request to the second switch IC that has at least the number of free memory units or responds to the request with a response that indicates that the request could not be fulfilled.
-
-
-
-
-
-
-
-
-
Search Results
39
records
(took 0.019 seconds)
