Abstract:
Power conversion systems and methods are provided for ride through of abnormal grid conditions or disturbances, in which a system rectifier is operated in a first mode to regulate a DC voltage of an intermediate DC circuit, an inverter is operated in the first mode to convert DC power from the intermediate DC circuit to provide AC output power to drive a load. In response to detecting an abnormal grid condition, the system changes to a second mode in which the rectifier is turned off and the inverter regulates the DC voltage of the intermediate DC circuit using power from the load.
Abstract:
Described herein are methods, systems, and apparatuses for determining sag in a signal. In one example, a method of tracking sag in a signal includes, when in an initial state, monitoring for when the signal transitions to a sag state based at least on an output of a tracking filter. In response to the signal transitioning to the sag state, increasing a bandwidth of the tracking filter and, when in the sag state, monitoring for when the signal transitions to a recovering state. The method further includes, in response to the signal transitioning to the recovering state, decreasing the bandwidth of the tracking filter.
Abstract:
A double fed induction generator (DFIG) converter, methods and computer readable mediums are presented in which rotor side current spikes are attenuated by selectively activating at least one series damping circuit to conduct current through a series damping circuit resistance coupled in series between one or more DFIG rotor leads and a grid side converter in response to a grid fault occurrence or a grid fault clearance, and selectively bypassing the series damping circuit resistance after activating the series damping circuit.
Abstract:
A transformerless parallel active rectifier system includes N multiphase common mode inductors directly connected to a shared multiphase AC input with no intervening transformer, and N active rectifiers coupled to respective ones of the N multiphase common mode inductors and having respective DC outputs coupled to a shared DC bus, where N is an integer greater than 1. The N active rectifiers have ground current regulators and are synchronized to provide DPWM switching control signals synchronized to one another to regulate their respective ground currents and concurrently regulate the shared DC bus voltage.
Abstract:
A system may include a power converter and a control system communicatively coupled to the power converter. The control system may determine a first DC voltage associated with the DC bus based on one or more DC external capacitance values that correspond to one or more loads coupled to the power converter. The control system may also determine a second DC voltage associated with the DC bus based on a capacitance of a system in which the power converter operates. The control system may also determine a third DC voltage associated with the DC bus based on the first DC voltage and the second DC voltage and adjust an operation of the power converter based on the third DC voltage.
Abstract:
Present embodiments relate to a method for synchronizing an electric grid. The method includes receiving a phase voltage of the electric grid. The method further includes determining one or more disturbance frequencies in the phase voltage via a plurality of sequential tracking filters, wherein each of the plurality of tracking filters corresponds to a harmonic of the received phase voltage. The method further includes removing the disturbance frequencies components sequentially to produce a minimally distorted frequency, and performing a PLL operation on the clean frequency to determine a phase angle of the frequency.
Abstract:
A phase angle detector with a PLL, a power converter, and a method for reducing offsets in an input signal, in which an adaptive offset processor selectively removes a DC offset component from the input signal to generate a modified signal including a fundamental frequency component and higher order harmonics of the input signal with the DC offset component removed, and the PLL provides a phase angle signal at least partially according to the modified signal.