公开(公告)号：US20050278664A1

公开(公告)日：2005-12-15

申请号：US10855725

申请日：2004-05-27

申请人： Rajat Chaudhry ,  Sang Dhong ,  Stephen Posluszny ,  Daniel Stasiak

发明人： Rajat Chaudhry ,  Sang Dhong ,  Stephen Posluszny ,  Daniel Stasiak

IPC分类号： G06F9/45 ,  G06F17/50

CPC分类号： G06F17/5022

摘要： A method, an apparatus, and a computer program are provided for predicting power consumption for chip. The model for predicting power consumptions is modified so at to provide a high degree of accuracy with a minimal amount of computing time. Traditionally, when modeling a chip, a vast amount of time and computer resources were required to predict power consumption. Techniques required less time and less computer power, but the accuracy also decreased. However, by breaking down a chip into macros and developing energy rules for each macro, simple techniques can be employed to accurately predict power consumption under real world conditions with a minimal amount of time and computing power.

摘要翻译： 提供了一种用于预测芯片功耗的方法，装置和计算机程序。 修改用于预测功耗的模型，以便以最小的计算时间提供高精度。 传统上，当对芯片建模时，需要大量的时间和计算机资源来预测功耗。 技术需要更少的时间和更少的计算机功率，但精度也降低了。 然而，通过将芯片分解成宏并为每个宏开发能量规则，可以采用简单的技术来以最小的时间和计算能力精确地预测现实世界条件下的功耗。

公开(公告)号：US06819538B2

公开(公告)日：2004-11-16

申请号：US09858126

申请日：2001-05-15

申请人： David T. Blaauw ,  Rajendran V. Panda ,  Rajat Chaudhry ,  Vladimir P. Zolotov ,  Ravindraraj Ramaraju

发明人： David T. Blaauw ,  Rajendran V. Panda ,  Rajat Chaudhry ,  Vladimir P. Zolotov ,  Ravindraraj Ramaraju

IPC分类号： H02H300

CPC分类号： G06F1/305

摘要： The present invention relates generally methods and apparatus for controlling current demand in an integrated circuit. One embodiment relates to a method that includes detecting if a supply voltage overshoot or a undershoot is present or anticipated, and if detected, controlling current consumed by a power consumption circuitry to ensure that the power supply voltage remains within acceptable levels. Other embodiments relate to an integrated circuit having a capacitive decoupling structure, power consumption circuitry, and power consumption control circuitry for controlling current consumed by at least a portion of the power consumption circuitry. Therefore, embodiments of the invention relate to monitoring and controlling power consumption (i.e. current demand) of a power consumption circuit (such as an integrated circuit) in order to prevent devastating supply voltage undershoots, overshoots, and oscillations.

摘要翻译： 本发明一般涉及用于控制集成电路中的电流需求的方法和装置。 一个实施例涉及一种方法，其包括检测是否存在电源电压过冲或下冲，并且如果检测到的话，控制消耗电力消耗的电流以确保电源电压保持在可接受的水平内。 其他实施例涉及具有电容去耦结构，功耗电路和功耗控制电路的集成电路，用于控制由功耗电路的至少一部分消耗的电流。 因此，本发明的实施例涉及监视和控制功耗电路（例如集成电路）的功耗（即电流需求），以便防止毁坏性的电源电压欠冲，过冲和振荡。

公开(公告)号：US20080133155A1

公开(公告)日：2008-06-05

申请号：US12016706

申请日：2008-01-18

申请人： Rajat Chaudhry ,  James Scott Neely ,  Daniel Lawrence Stasiak

发明人： Rajat Chaudhry ,  James Scott Neely ,  Daniel Lawrence Stasiak

IPC分类号： G01R21/00

CPC分类号： G06F1/3203 ,  G06F1/3237 ,  G06F1/3287 ,  Y02D10/128 ,  Y02D10/171

摘要： A method, a computer program, and an apparatus are provided for generating circuit energy models for a macro using multiple clock gating inputs. Circuit energy models are used to estimate system power consumption. The present invention enables circuit energy models to be created for macros that contain multiple clock gating inputs. Energy tables are created based upon the macro's input switching factor and the clock activation percentage. The clock activation percentage is produced by turning on and off the multiple clock gating inputs during the simulations. These energy tables are generated from a minimum number of power simulations. By using clock activation percentage as a parameter accurate power estimations are produced.

摘要翻译： 提供了一种方法，计算机程序和装置，用于使用多个时钟选通输入来产生用于宏的电路能量模型。 电路能量模型用于估计系统功耗。 本发明使得能够为包含多个时钟选通输入的宏创建电路能量模型。 能量表基于宏的输入开关因子和时钟激活百分比创建。 通过在模拟期间打开和关闭多个时钟门控输入来产生时钟激活百分比。 这些能量表是从最小数量的功率模拟产生的。 通过使用时钟激活百分比作为参数，产生精确的功率估计。

公开(公告)号：US07346866B2

公开(公告)日：2008-03-18

申请号：US11044597

申请日：2005-01-27

申请人： Rajat Chaudhry ,  James Scott Neely ,  Daniel Lawrence Stasiak

发明人： Rajat Chaudhry ,  James Scott Neely ,  Daniel Lawrence Stasiak

IPC分类号： G06F17/50

CPC分类号： G06F17/5022 ,  G06F2217/78

摘要： A method, a computer program, and an apparatus are provided for generating circuit energy models for a macro using clock gating inputs. Circuit energy models are used to estimate system power consumption. The present invention enables circuit energy models to be created for macros that contain clock gating inputs. Power tables are created based upon the macro's input switching factor percentage and the clock activation percentage. These power tables are generated from a minimum number of power simulations. By using clock activation percentage as a parameter accurate energy tables are produced.

摘要翻译： 提供了一种方法，计算机程序和装置，用于使用时钟门控输入来产生用于宏的电路能量模型。 电路能量模型用于估计系统功耗。 本发明使得能够为包含时钟门控输入的宏创建电路能量模型。 功率表基于宏的输入开关因子百分比和时钟激活百分比创建。 这些功率表是从最小数量的功率模拟产生的。 通过使用时钟激活百分比作为参数，产生精确的能量表。

公开(公告)号：US07343499B2

公开(公告)日：2008-03-11

申请号：US11044568

申请日：2005-01-27

申请人： Rajat Chaudhry ,  James Scott Neely ,  Daniel Lawrence Stasiak

发明人： Rajat Chaudhry ,  James Scott Neely ,  Daniel Lawrence Stasiak

IPC分类号： G06F17/50 ,  G06F1/00

CPC分类号： G06F1/3203 ,  G06F1/3237 ,  G06F1/3287 ,  Y02D10/128 ,  Y02D10/171

摘要： A method, a computer program, and an apparatus are provided for generating circuit energy models for a macro using multiple clock gating inputs. Circuit energy models are used to estimate system power consumption. The present invention enables circuit energy models to be created for macros that contain multiple clock gating inputs. Energy tables are created based upon the macro's input switching factor and the clock activation percentage. The clock activation percentage is produced by turning on and off the multiple clock gating inputs during the simulations. These energy tables are generated from a minimum number of power simulations. By using clock activation percentage as a parameter accurate power estimations are produced.

摘要翻译： 提供了一种方法，计算机程序和装置，用于使用多个时钟选通输入来产生用于宏的电路能量模型。 电路能量模型用于估计系统功耗。 本发明使得能够为包含多个时钟选通输入的宏创建电路能量模型。 能量表基于宏的输入开关因子和时钟激活百分比创建。 通过在模拟期间打开和关闭多个时钟门控输入来产生时钟激活百分比。 这些能量表是从最小数量的功率模拟产生的。 通过使用时钟激活百分比作为参数，产生精确的功率估计。

公开(公告)号：US20060168456A1

公开(公告)日：2006-07-27

申请号：US11044568

申请日：2005-01-27

申请人： Rajat Chaudhry ,  James Neely ,  Daniel Stasiak

发明人： Rajat Chaudhry ,  James Neely ,  Daniel Stasiak

IPC分类号： G06F1/26

CPC分类号： G06F1/3203 ,  G06F1/3237 ,  G06F1/3287 ,  Y02D10/128 ,  Y02D10/171

摘要： A method, a computer program, and an apparatus are provided for generating circuit energy models for a macro using multiple clock gating inputs. Circuit energy models are used to estimate system power consumption. The present invention enables circuit energy models to be created for macros that contain multiple clock gating inputs. Energy tables are created based upon the macro's input switching factor and the clock activation percentage. The clock activation percentage is produced by turning on and off the multiple clock gating inputs during the simulations. These energy tables are generated from a minimum number of power simulations. By using clock activation percentage as a parameter accurate power estimations are produced.

摘要翻译： 提供了一种方法，计算机程序和装置，用于使用多个时钟选通输入来产生用于宏的电路能量模型。 电路能量模型用于估计系统功耗。 本发明使得能够为包含多个时钟选通输入的宏创建电路能量模型。 能量表基于宏的输入开关因子和时钟激活百分比创建。 通过在模拟期间打开和关闭多个时钟门控输入来产生时钟激活百分比。 这些能量表是从最小数量的功率模拟产生的。 通过使用时钟激活百分比作为参数，产生精确的功率估计。

公开(公告)号：US07725744B2

公开(公告)日：2010-05-25

申请号：US12016706

申请日：2008-01-18

申请人： Rajat Chaudhry ,  James Scott Neely ,  Daniel Lawrence Stasiak

发明人： Rajat Chaudhry ,  James Scott Neely ,  Daniel Lawrence Stasiak

IPC分类号： G06F17/50 ,  G06F1/00

CPC分类号： G06F1/3203 ,  G06F1/3237 ,  G06F1/3287 ,  Y02D10/128 ,  Y02D10/171

摘要： A method, a computer program, and an apparatus are provided for generating circuit energy models for a macro using multiple clock gating inputs. Circuit energy models are used to estimate system power consumption. The present invention enables circuit energy models to be created for macros that contain multiple clock gating inputs. Energy tables are created based upon the macro's input switching factor and the clock activation percentage. The clock activation percentage is produced by turning on and off the multiple clock gating inputs during the simulations. These energy tables are generated from a minimum number of power simulations. By using clock activation percentage as a parameter accurate power estimations are produced.

摘要翻译： 提供了一种方法，计算机程序和装置，用于使用多个时钟选通输入来产生用于宏的电路能量模型。 电路能量模型用于估计系统功耗。 本发明使得能够为包含多个时钟选通输入的宏创建电路能量模型。 能量表基于宏的输入开关因子和时钟激活百分比创建。 通过在模拟期间打开和关闭多个时钟门控输入来产生时钟激活百分比。 这些能量表是从最小数量的功率模拟产生的。 通过使用时钟激活百分比作为参数，产生精确的功率估计。

公开(公告)号：US20080021692A1

公开(公告)日：2008-01-24

申请号：US11459060

申请日：2006-07-21

申请人： Rajat Chaudhry ,  Sang H. Dhong ,  Gilles Gervais ,  Danny J. Klema

发明人： Rajat Chaudhry ,  Sang H. Dhong ,  Gilles Gervais ,  Danny J. Klema

IPC分类号： G06F17/50

CPC分类号： G06F17/5022 ,  G06F1/3203 ,  G06F2217/78 ,  Y02D10/124

摘要： A power estimation system uses a hardware accelerated simulator to advance simulation to a point of interest for power estimation. The hardware accelerated simulator generates a checkpoint file, which is then used by a software simulator to initiate simulation of the processor design model for power estimation. An on-the-fly power estimator provides power calculations in memory. Thus, the power estimation system described herein isolates instruction sequences to determine portions of software code that may consume excess power or generate noise and to provide a more accurate power estimate on the fly.

摘要翻译： 功率估计系统使用硬件加速模拟器将模拟推进到功率估计的兴趣点。 硬件加速模拟器产生一个检查点文件，然后由软件模拟器用来启动用于功率估计的处理器设计模型的仿真。 动态功率估计器在存储器中提供功率计算。 因此，本文描述的功率估计系统隔离指令序列以确定可消耗过多功率或产生噪声的软件代码的部分并且在飞行中提供更准确的功率估计。

公开(公告)号：US20060167673A1

公开(公告)日：2006-07-27

申请号：US11044599

申请日：2005-01-27

申请人： Rajat Chaudhry ,  James Neely ,  Daniel Stasiak

发明人： Rajat Chaudhry ,  James Neely ,  Daniel Stasiak

IPC分类号： G06F17/50

CPC分类号： G06F17/5022

摘要： A method, a computer program, and an apparatus are provided for generating circuit energy models for a macro containing internal clock gating. Circuit energy models are used to estimate system power consumption. The present invention enables circuit energy models to be created for macros that contain internal clock gating and multiple clock gating inputs. To achieve accurate power estimates a voltage supply is connected to each clock activate signal. Energy tables are then created based upon the macro's input switching factor percentage and clock activation percentage. These power tables are generated from a minimum number of power simulations. By incorporating internally generated clock activate signals into the power estimations the macro energy tables are much more accurate.

摘要翻译： 提供了一种用于产生用于包含内部时钟门控的宏的电路能量模型的方法，计算机程序和装置。 电路能量模型用于估计系统功耗。 本发明使得能够为包含内部时钟门控和多个时钟门控输入的宏创建电路能量模型。 为了实现精确的功率估计，电源连接到每个时钟激活信号。 然后根据宏的输入切换因子百分比和时钟激活百分比创建能量表。 这些功率表是从最小数量的功率模拟产生的。 通过将内部生成的时钟激活信号并入功率估计中，宏能量表更准确。

公开(公告)号：US20050159907A1

公开(公告)日：2005-07-21

申请号：US10759936

申请日：2004-01-16

申请人： Rajat Chaudhry ,  Brian Flachs ,  Daniel Stasiak

发明人： Rajat Chaudhry ,  Brian Flachs ,  Daniel Stasiak

IPC分类号： G06F17/50 ,  G06F19/00

CPC分类号： G06F17/5036

摘要： A method, an apparatus, and a computer program are provided for modeling algorithm for power consumption with improved accuracy. The improved model allows for variable operation of Local Clock Buffers (LCBs), which consume significant amounts power. Also, the amount of power consumed by each LCB can be varied. These variations of operation of LCBs and power consumption by LCBs allows for a more realistic model of operation of a given circuit or macro instead of the traditional “worst-case scenario” of power consumption.

摘要翻译： 提供了一种方法，装置和计算机程序，用于提高精度的功耗建模算法。 改进的模型允许本地时钟缓冲器（LCB）的可变操作，其消耗大量的功率。 此外，每个LCB消耗的功率量可以变化。 LCB的这些操作变化和LCB的功耗允许给定电路或宏的更实际的操作模型，而不是传统的“最坏情况”的功耗。