Abstract:
An automated test equipment (ATE) system includes a plurality of test blades each coupled to a test blade connector and mounted on a circular track; a central reference clock (CRC) having an origin point at a center of the circle; and a clock/sync connector coupled to the CRC through a zero skew clock connection to one or more sync buses, wherein each instrument utilizes the CRC to coordinate its testing process with another instrument.
Abstract:
An automated test equipment (ATE) system includes a plurality of test blades each coupled to a test blade connector and mounted on a circular track; a central reference clock (CRC) having an origin point at a center of the circle; and a clock/sync connector coupled to the CRC through a zero skew clock connection to one or more sync buses, wherein each instrument utilizes the CRC to coordinate its testing process with another instrument.
Abstract:
An automated test equipment (ATE) system includes a plurality of test blades each coupled to a test blade connector and mounted on a circular track; a central reference clock (CRC) having an origin point at a center of the circle; and a clock/sync connector coupled to the CRC through a zero skew clock connection to one or more sync buses, wherein each instrument utilizes the CRC to coordinate its testing process with another instrument.
Abstract:
An automated test equipment (ATE) system includes a plurality of test blades each coupled to a test blade connector and mounted on a circular track; a central reference clock (CRC) having an origin point at a center of the circle; and a clock/sync connector coupled to the CRC through a zero skew clock connection to one or more sync buses, wherein each instrument utilizes the CRC to coordinate its testing process with another instrument.
Abstract:
Systems and/or methods that facilitate reading data from a memory component associated with a network are presented. A pre-fetch generation component generates a pre-fetch request based in part on a received read command. To facilitate a reduction in latency associated with transmitting the read command via an interconnect network component to which the memory component is connected, the pre-fetch request is transmitted directly to the memory component bypassing a portion of the interconnect network component. The memory component specified in the pre-fetch request receives the pre-fetch request and reads the data stored therein, and can store the read data in a buffer and/or transmit the read data to the requester via the interconnect network component, even though the read command has not yet reached the memory component. The read data is verified by comparison with the read command at a convergence point.
Abstract:
A method for error handling of corrupted repeating primitives during frame reception is disclosed. The method comprises identifying a portion of a received frame including a repeating primitive sequence, determining whether data in the repeating primitive sequence has one or more errors, and indicating a successful reception of the received frame with the one or more errors in the repeating primitive sequence if the number of errors is less than a determined threshold. Other embodiments are also disclosed.