Methods of forming conductive lines and methods of forming conductive contacts adjacent conductive lines
    11.
    发明申请
    Methods of forming conductive lines and methods of forming conductive contacts adjacent conductive lines 有权
    形成导线的方法和在导电线附近形成导电接触的方法

    公开(公告)号:US20060040465A1

    公开(公告)日:2006-02-23

    申请号:US10925158

    申请日:2004-08-23

    IPC分类号: H01L21/76

    摘要: This invention includes methods of forming conductive lines, and methods of forming conductive contacts adjacent conductive lines. In one implementation, a method of forming a conductive line includes forming a conductive line within an elongated trench within first insulative material over a semiconductive substrate. The conductive line is laterally spaced from opposing first insulative material sidewall surfaces of the trench. The conductive line includes a second conductive material received over a different first conductive material. The second conductive material is recessed relative to an elevationally outer surface of the first insulative material proximate the trench. A second insulative material different from the first insulative material is formed within the trench over a top surface of the conductive line and within laterally opposing spaces received between the first insulative material and the conductive line. In one implementation, a conductive contact is formed adjacent to and insulated from the conductive line.

    摘要翻译: 本发明包括形成导线的方法,以及在导线附近形成导电触点的方法。 在一个实施方案中,形成导线的方法包括在第一绝缘材料内的细长沟槽内在半导体衬底上形成导电线。 导电线与沟槽的相对的第一绝缘材料侧壁表面横向隔开。 导电线包括接收在不同的第一导电材料上的第二导电材料。 第二导电材料相对于靠近沟槽的第一绝缘材料的正面外表面凹陷。 不同于第一绝缘材料的第二绝缘材料形成在导电线的顶表面之下的沟槽内并且在第一绝缘材料和导电线之间的横向相对的空间内。 在一个实施方案中,导电接触形成为与导电线相邻并与其绝缘。

    Methods of plasma etching platinum-comprising materials, methods of processing semiconductor substrates in the fabrication of integrated circuitry, and methods of forming a plurality of memory cells
    12.
    发明授权
    Methods of plasma etching platinum-comprising materials, methods of processing semiconductor substrates in the fabrication of integrated circuitry, and methods of forming a plurality of memory cells 有权
    等离子体蚀刻含铂材料的方法,在制造集成电路中处理半导体衬底的方法以及形成多个存储单元的方法

    公开(公告)号:US08696922B2

    公开(公告)日:2014-04-15

    申请号:US12489062

    申请日:2009-06-22

    IPC分类号: C23F1/00 H01L21/311

    CPC分类号: H01L21/32136 H01L27/11521

    摘要: A platinum-comprising material is plasma etched by being exposed to a plasma etching chemistry that includes CHCl3, CO2 and O2. In one embodiment, a method of processing a semiconductor substrate in the fabrication of integrated circuitry includes forming metallic platinum-comprising nanoparticles over a material. A portion of the nanoparticles is masked and another portion of the nanoparticles is unmasked. The unmasked portion of the metallic platinum-comprising nanoparticles is plasma etched using a plasma etching chemistry comprising CHCl3, CO2 and O2. Other embodiments are disclosed.

    摘要翻译: 通过暴露于包括CHCl 3,CO 2和O 2的等离子体蚀刻化学品来等离子体蚀刻包含铂的材料。 在一个实施例中,在集成电路的制造中处理半导体衬底的方法包括在材料上形成包含金属的纳米颗粒。 纳米颗粒的一部分被掩蔽并且纳米颗粒的另一部分未被掩蔽。 使用包括CHCl 3,CO 2和O 2的等离子体蚀刻化学品等离子体蚀刻含金属铂纳米颗粒的未掩模部分。 公开了其他实施例。

    Methods of forming a photoresist-comprising pattern on a substrate
    13.
    发明授权
    Methods of forming a photoresist-comprising pattern on a substrate 有权
    在基板上形成含光致抗蚀剂的图案的方法

    公开(公告)号:US08409457B2

    公开(公告)日:2013-04-02

    申请号:US12201744

    申请日:2008-08-29

    IPC分类号: C03C15/00

    CPC分类号: G03F7/40 G03F7/0035

    摘要: A method of forming a photoresist-comprising pattern on a substrate includes forming a patterned first photoresist having spaced first masking shields in at least one cross section over a substrate. The first masking shields are exposed to a fluorine-containing plasma effective to form a hydrogen and fluorine-containing organic polymer coating about outermost surfaces of the first masking shields. A second photoresist is deposited over and in direct physical touching contact with the hydrogen and fluorine-containing organic polymer coating. The second photoresist which is in direct physical touching contact with the hydrogen and fluorine-containing organic polymer coating is exposed to a pattern of actinic energy and thereafter spaced second masking shields are formed in the one cross section which comprise the second photoresist and correspond to the actinic energy pattern. The first and second masking shields together form at least a part of a photoresist-comprising pattern on the substrate. Other embodiments are disclosed.

    摘要翻译: 在衬底上形成含光致抗蚀剂的图案的方法包括在衬底上的至少一个横截面上形成具有间隔开的第一掩蔽屏蔽的图案化的第一光致抗蚀剂。 第一掩蔽屏蔽暴露于含氟等离子体中,有效地在第一掩蔽屏蔽件的最外表面上形成氢和含氟有机聚合物涂层。 第二光致抗蚀剂沉积在氢和含氟有机聚合物涂层上并与其直接物理接触接触。 与氢和含氟有机聚合物涂层直接物理接触接触的第二光致抗蚀剂暴露于光化能的图案,此后在包含第二光致抗蚀剂的一个横截面中形成间隔开的第二掩蔽屏蔽,并对应于 光化能量模式。 第一和第二掩蔽屏蔽一起在衬底上形成包含光致抗蚀剂的图案的至少一部分。 公开了其他实施例。

    Methods Of Plasma Etching Platinum-Comprising Materials, Methods Of Processing Semiconductor Substrates In The Fabrication Of Integrated Circuitry, And Methods Of Forming A Plurality Of Memory Cells
    15.
    发明申请
    Methods Of Plasma Etching Platinum-Comprising Materials, Methods Of Processing Semiconductor Substrates In The Fabrication Of Integrated Circuitry, And Methods Of Forming A Plurality Of Memory Cells 有权
    等离子体蚀刻铂包合材料的方法,半导体衬底加工集成电路的方法以及形成多种记忆体的方法

    公开(公告)号:US20100323523A1

    公开(公告)日:2010-12-23

    申请号:US12489062

    申请日:2009-06-22

    IPC分类号: H01L21/467 H01L21/465

    CPC分类号: H01L21/32136 H01L27/11521

    摘要: A platinum-comprising material is plasma etched by being exposed to a plasma etching chemistry that includes CHCl3, CO2 and O2. In one embodiment, a method of processing a semiconductor substrate in the fabrication of integrated circuitry includes forming metallic platinum-comprising nanoparticles over a material. A portion of the nanoparticles is masked and another portion of the nanoparticles is unmasked. The unmasked portion of the metallic platinum-comprising nanoparticles is plasma etched using a plasma etching chemistry comprising CHCl3, CO2 and O2. Other embodiments are disclosed.

    摘要翻译: 通过暴露于包括CHCl 3,CO 2和O 2的等离子体蚀刻化学品来等离子体蚀刻包含铂的材料。 在一个实施例中,在集成电路的制造中处理半导体衬底的方法包括在材料上形成包含金属的纳米颗粒。 纳米颗粒的一部分被掩蔽并且纳米颗粒的另一部分未被掩蔽。 使用包括CHCl 3,CO 2和O 2的等离子体蚀刻化学品等离子体蚀刻含金属铂纳米颗粒的未掩蔽部分。 公开了其他实施例。

    Methods Of Forming A Photoresist-Comprising Pattern On A Substrate
    16.
    发明申请
    Methods Of Forming A Photoresist-Comprising Pattern On A Substrate 有权
    在基板上形成光致抗蚀剂包含图案的方法

    公开(公告)号:US20100055913A1

    公开(公告)日:2010-03-04

    申请号:US12201744

    申请日:2008-08-29

    IPC分类号: H01L21/311 B44C1/22 B44C1/14

    CPC分类号: G03F7/40 G03F7/0035

    摘要: A method of forming a photoresist-comprising pattern on a substrate includes forming a patterned first photoresist having spaced first masking shields in at least one cross section over a substrate. The first masking shields are exposed to a fluorine-containing plasma effective to form a hydrogen and fluorine-containing organic polymer coating about outermost surfaces of the first masking shields. A second photoresist is deposited over and in direct physical touching contact with the hydrogen and fluorine-containing organic polymer coating. The second photoresist which is in direct physical touching contact with the hydrogen and fluorine-containing organic polymer coating is exposed to a pattern of actinic energy and thereafter spaced second masking shields are formed in the one cross section which comprise the second photoresist and correspond to the actinic energy pattern. The first and second masking shields together form at least a part of a photoresist-comprising pattern on the substrate. Other embodiments are disclosed.

    摘要翻译: 在衬底上形成含光致抗蚀剂的图案的方法包括在衬底上的至少一个横截面上形成具有间隔开的第一掩蔽屏蔽的图案化的第一光致抗蚀剂。 第一掩蔽屏蔽暴露于含氟等离子体中,有效地在第一掩蔽屏蔽件的最外表面上形成氢和含氟有机聚合物涂层。 第二光致抗蚀剂沉积在氢和含氟有机聚合物涂层上并与其直接物理接触接触。 与氢和含氟有机聚合物涂层直接物理接触接触的第二光致抗蚀剂暴露于光化能的图案,此后在包含第二光致抗蚀剂的一个横截面中形成间隔开的第二掩蔽屏蔽,并对应于 光化能量模式。 第一和第二掩蔽屏蔽一起在衬底上形成包含光致抗蚀剂的图案的至少一部分。 公开了其他实施例。

    Semiconductor device fabrication and dry develop process suitable for critical dimension tunability and profile control
    17.
    发明申请
    Semiconductor device fabrication and dry develop process suitable for critical dimension tunability and profile control 有权
    半导体器件制造和干式开发工艺适用于关键尺寸可调性和型材控制

    公开(公告)号:US20080014533A1

    公开(公告)日:2008-01-17

    申请号:US11487246

    申请日:2006-07-14

    IPC分类号: G03F1/00 G03C5/00

    摘要: The critical dimension (CD) of features formed during the fabrication of a semiconductor device may be controlled through the use of a dry develop chemistry comprising O2, SO2 and a hydrogen halide. For example, a dry develop chemistry comprising a gas comprising O2 and a gas comprising SO2 and a gas comprising HBr may be used to remove exposed areas of a carbon-based mask. The addition of HBr to the conventional O2 and SO2 dry develop chemistry enables a user to tune the critical dimension by growing, trimming and/or sloping the sidewalls and to enhance sidewall passivation and reduce sidewall bowing.

    摘要翻译: 在制造半导体器件期间形成的特征的临界尺寸(CD)可以通过使用包含O 2,SO 2 H和氢的干显影化学 卤化物。 例如,包含含O 2气体和包含SO 2的气体和包含HBr的气体的干式显影化学物质可用于除去碳基的暴露区域 面具。 将HBr加入到常规的O 2和SO 2干式开发化学物质中使得用户能够通过增长,修整和/或倾斜侧壁来调整临界尺寸并增强 侧壁钝化和减少侧壁弯曲。

    Method of forming a conductive line and a method of forming a conductive contact adjacent to and insulated from a conductive line

    公开(公告)号:US20060189128A1

    公开(公告)日:2006-08-24

    申请号:US11412524

    申请日:2006-04-27

    IPC分类号: H01L21/4763

    摘要: This invention includes methods of forming conductive lines, and methods of forming conductive contacts adjacent conductive lines. In one implementation, a method of forming a conductive line includes forming a conductive line within an elongated trench within first insulative material over a semiconductive substrate. The conductive line is laterally spaced from opposing first insulative material sidewall surfaces of the trench. The conductive line includes a second conductive material received over a different first conductive material. The second conductive material is recessed relative to an elevationally outer surface of the first insulative material proximate the trench. A second insulative material different from the first insulative material is formed within the trench over a top surface of the conductive line and within laterally opposing spaces received between the first insulative material and the conductive line. In one implementation, a conductive contact is formed adjacent to and insulated from the conductive line.