Abstract:
The present invention is a temperature sensor which is based on the actual temperature coefficients of a device in the circuit, rather than a predetermined threshold voltage that varies across different devices. This temperature sensor includes a circuit which determines the temperature of a device. More particularly, CMOS circuit is provided which uses a current source to generate charge and discharge voltages applied to a capacitor. These voltages are dependent on the temperature coefficient of a resistor in the current source. The charge and discharge times are then used to determine a frequency which is dependent on the temperature coefficient of the resistor. Thus, the temperature is sensed based on the output frequency of the circuit. Additionally, the present invention includes a mechanism which allows the temperature sensor to be activated or deactivated as needed.
Abstract:
An apparatus and method for switching between two power supplies, a primary power supply and a secondary power supply. The present invention generates a first reference voltage using the voltage of the primary power supply and the secondary power supply, wherein the primary power supply voltage is variable. The present invention also generates a second reference voltage based on the voltage of the primary power supply. The first and second reference voltages each have a different slope and the crossing point between these two reference voltages indicate that a switch between the primary power supply and the secondary power supply should occur.
Abstract:
A low power, low voltage level shifter is provided. The voltage level shifter includes a first switching circuit, and a second switching circuit. The first switching circuit has a first input terminal for receiving a first oscillating signal, and based on the first oscillating signal, switches the output of the first switching circuit between a first voltage level and a second voltage level. The second switching circuit has a second input terminal connected to the output terminal of the first switching circuit. The second switching circuit also has a third input terminal for receiving a second oscillating signal which is out of phase with the first oscillating signal. Based on the input signals received, the second switching circuit generates an output signal that switches between a third voltage level and a fourth voltage level at a selected rate and frequency.
Abstract:
A system, method, and apparatus for receiving notifications from a notifying device, and alerting a user as to the notification are provided. Embodiments of the present invention include a connectivity transceiver, and a notifying device transceiver positioned within a signal distance of a signal transmitted by the connectivity transceiver, wherein the connectivity controller is configured to set the signal distance to a reduced signal distance upon initiating a pairing operation with the notifying device transceiver. Further, the connectivity transceiver may be communicably coupled to a system controller that adjusts an interval duty cycle of inquiry scans and page scans based on a connection with the notifying device transceiver.
Abstract:
A temperature compensated clock and method of clocking systems are provided. The clock preferably has an oscillator for generating an oscillating waveform signal at a preselected frequency and a frequency divider responsive to the oscillator for dividing the frequency of the oscillating waveform signal. A temperature monitoring circuit is positioned responsive to a voltage input signal independent of temperature and a voltage input signal proportional to temperature for monitoring temperature variations. A temperature compensating circuit, preferably including a programmable scaling circuit, is responsive to the frequency divider and the temperature monitoring circuit for scaling the divided frequency of the generated waveform and thereby advantageously produces a temperature compensated output timing signal.
Abstract:
A method and circuit are disclosed for measuring temperature. An exemplary embodiment of the present invention includes a first oscillator circuit that generates a first signal having a frequency that is dependent upon a sensed temperature. Difference circuitry determines a difference in frequency between the first signal and the second signal having a frequency that is substantially independent of temperature, and generates a difference signal having a number of pulses thereon based upon the difference. A counter circuit is responsive to the difference circuitry for offsetting a predetermined temperature level based upon the pulses appearing on the difference signal, to obtain an output signal indicative of the sensed temperature.
Abstract:
Crystal oscillator circuitry provides a very fast start-up function requiring less than 100 mS. The crystal oscillator circuitry enters a stop mode when a control signal transitions from a first logic level to a second logic level thereby causing a crystal to stop oscillating. In order to initiate the fast start-up function, a pulse is provided to the gate of a transistor which is electrically connected between a first node and a second node, thus causing the voltage of the first node to move towards the voltage level of the second node and the second node to move towards the voltage level of the first node. Upon initiation of the start-up function, the energy at the crystal of the crystal oscillator circuitry is at least four times higher than the energy required in a steady state mode. The crystal oscillator circuitry has a VT (threshold voltage) independent high feedback resistance which provides stable oscillation frequency over a wide range of Vcc supply voltage. The VT independent high feedback resistance is ensured by proper sizing of the transistors of the crystal oscillator circuitry.
Abstract:
A power supply isolation and switching circuit formed in a semiconductor structure which eliminates a parasitic diode effect. The switching circuit receives a first power source and a second power source, and selects between the two sources to provide the selected power source to a load device. The switching circuit includes a first transistor, and second and third transistors. The first transistor is connected to the first power source for selecting the first power source as the supply voltage of the load device. The second and third transistors are connected in series to the second power source for selecting the second power source. The second and third transistors are formed in two separate wells of a first conductivity type that are spaced apart and isolated from each other by a semiconductor region of a second conductivity type different from the first conductivity type. In operation, when the voltage level of the first power source is higher than a predetermined voltage, the first transistor is turned on to connect the first power source to the load device, and the second and third transistors are turned off to isolate the second power source from the load device. When its voltage falls below the predetermined voltage, however, the first transistor is turned off to isolate the first power source and the second and third transistors are turned on to connect the second power source to the load device.
Abstract:
A circuit and method are disclosed for monitoring the state of at least one switch. The circuit may include a first circuit, coupled to a switch, for detecting whether the switch is in one of a closed state and an open state and generating a signal having a value based upon the detection. The circuit may further include a second circuit, coupled to the first circuit, for configuring the first circuit to selectively detect the switch switching from a normally open state and to selectively detect the switch switching from a normally closed state.
Abstract:
A circuit and method are disclosed for detecting activation of a switch, such as a mechanical switch. The circuit may include a first circuit for temporarily driving the second terminal of the switch to a second logic level. A second circuit, coupled to the switch, senses a voltage level of the second terminal of the switch and generates an output signal representative of the voltage sensed. A sequential logic circuit is responsive to the output signal of the second circuit so as to maintain a logic value representative of the switch having been closed.