公开(公告)号：US20200035705A1

公开(公告)日：2020-01-30

申请号：US16295198

申请日：2019-03-07

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ho-Jun Kim ,  Jaehyeoung Ma ,  Geumjong Bae

IPC: H01L27/118 ,  H01L21/8238

Abstract: Semiconductor devices and methods of forming the same are provided. Semiconductor devices may include first and second active patterns on a substrate. Each of the first and second active patterns may extend in a first direction. The first and second active patterns may be aligned along the first direction and may be separated by a first trench extending in a second direction. The first trench may define a first sidewall of the first active pattern. The semiconductor devices may also include a channel pattern including first and second semiconductor patterns stacked on the first active pattern, a dummy gate electrode on the channel pattern and extending in the second direction, and a gate spacer on one side of the dummy gate electrode, the one side of the dummy gate electrode being adjacent to the first trench. The gate spacer may cover a first sidewall of the first active pattern.

公开(公告)号：US20190027475A1

公开(公告)日：2019-01-24

申请号：US16137625

申请日：2018-09-21

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sung-Dae Suk ,  Jongho Lee ,  Geumjong Bae

IPC: H01L27/092 ,  H01L29/786 ,  H01L29/78 ,  H01L29/66 ,  H01L21/8238 ,  H01L29/417 ,  H01L23/535 ,  H01L29/423

Abstract: A semiconductor device includes an insulating layer on a substrate, a channel region on the insulating layer, a gate structure on the insulating layer, the gate structure crossing the channel region, source/drain regions on the insulating layer, the source/drain regions being spaced apart from each other with the gate structure interposed therebetween, the channel region connecting the source/drain regions to each other, and contact plugs connected to the source/drain regions, respectively. The channel region includes a plurality of semiconductor patterns that are vertically spaced apart from each other on the insulating layer, the insulating layer includes first recess regions that are adjacent to the source/drain regions, respectively, and the contact plugs include lower portions provided into the first recess regions, respectively.

公开(公告)号：US12250836B2

公开(公告)日：2025-03-11

申请号：US18595542

申请日：2024-03-05

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ho-Jun Kim ,  Jaehyeoung Ma ,  Geumjong Bae

IPC: H10D84/85 ,  H10D30/67 ,  H10D84/83 ,  H10D84/90

Abstract: Semiconductor devices and methods of forming the same are provided. Semiconductor devices may include first and second active patterns on a substrate. Each of the first and second active patterns may extend in a first direction. The first and second active patterns may be aligned along the first direction and may be separated by a first trench extending in a second direction. The first trench may define a first sidewall of the first active pattern. The semiconductor devices may also include a channel pattern including first and second semiconductor patterns stacked on the first active pattern, a dummy gate electrode on the channel pattern and extending in the second direction, and a gate spacer on one side of the dummy gate electrode, the one side of the dummy gate electrode being adjacent to the first trench. The gate spacer may cover a first sidewall of the first active pattern.

公开(公告)号：US20240213253A1

公开(公告)日：2024-06-27

申请号：US18595542

申请日：2024-03-05

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ho-Jun Kim ,  Jaehyeoung Ma ,  Geumjong Bae

IPC: H01L27/118 ,  H01L29/423

CPC classification number: H01L27/11807 ,  H01L29/42392 ,  H01L2027/11829

Abstract: Semiconductor devices and methods of forming the same are provided. Semiconductor devices may include first and second active patterns on a substrate. Each of the first and second active patterns may extend in a first direction. The first and second active patterns may be aligned along the first direction and may be separated by a first trench extending in a second direction. The first trench may define a first sidewall of the first active pattern. The semiconductor devices may also include a channel pattern including first and second semiconductor patterns stacked on the first active pattern, a dummy gate electrode on the channel pattern and extending in the second direction, and a gate spacer on one side of the dummy gate electrode, the one side of the dummy gate electrode being adjacent to the first trench. The gate spacer may cover a first sidewall of the first active pattern.

公开(公告)号：US11637205B2

公开(公告)日：2023-04-25

申请号：US17140786

申请日：2021-01-04

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Junggil Yang ,  Seungmin Song ,  Geumjong Bae ,  Dong Il Bae

IPC: H01L29/78 ,  H01L29/423 ,  H01L29/417 ,  H01L29/66 ,  H01L29/786

Abstract: A semiconductor device includes a channel pattern including a first semiconductor pattern and a second semiconductor pattern, which are sequentially stacked on a substrate, and a gate electrode that extends in a first direction and crosses the channel pattern. The gate electrode includes a first portion interposed between the substrate and the first semiconductor pattern and a second portion interposed between the first and second semiconductor patterns. A maximum width in a second direction of the first portion is greater than a maximum width in the second direction of the second portion, and a maximum length in the second direction of the second semiconductor pattern is less than a maximum length in the second direction of the first semiconductor pattern.

公开(公告)号：US20190252555A1

公开(公告)日：2019-08-15

申请号：US16395907

申请日：2019-04-26

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Mongsong Liang ,  Sung-Dae Suk ,  Geumjong Bae

IPC: H01L29/786 ,  H01L21/8234 ,  H01L27/088 ,  H01L27/11 ,  H01L29/16 ,  H01L29/161 ,  H01L29/165 ,  H01L29/423 ,  H01L29/66 ,  H01L29/78 ,  H01L29/06

CPC classification number: H01L29/78696 ,  H01L21/823412 ,  H01L21/823418 ,  H01L21/823437 ,  H01L27/088 ,  H01L27/1104 ,  H01L27/1116 ,  H01L29/0673 ,  H01L29/1608 ,  H01L29/161 ,  H01L29/165 ,  H01L29/42392 ,  H01L29/66545 ,  H01L29/7848 ,  H01L29/78618

Abstract: A semiconductor device includes a first transistor, a second transistor and a third transistor provided on a substrate, the first to third transistors respectively including source and drain regions spaced apart from each other, a gate structure extending in a first direction on the substrate and interposed between the source and drain regions, and a channel region connecting the source and drain regions to each other. A channel region of the second transistor and a channel region of the third transistor respectively include a plurality of channel portions, the plurality of channel portions spaced apart from each other in a second direction, perpendicular to an upper surface of the substrate, and connected to the source and drain regions, respectively. A width of a channel portion of the third transistor in the first direction is greater than a width of a channel portion of the second transistor in the first direction.

公开(公告)号：US20190165157A1

公开(公告)日：2019-05-30

申请号：US16011785

申请日：2018-06-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： Junggil Yang ,  Seungmin Song ,  Geumjong Bae ,  DONG IL BAE

IPC: H01L29/78 ,  H01L29/423 ,  H01L29/417 ,  H01L29/66

Abstract: A semiconductor device includes a channel pattern including a first semiconductor pattern and a second semiconductor pattern, which are sequentially stacked on a substrate, and a gate electrode that extends in a first direction and crosses the channel pattern. The gate electrode includes a first portion interposed between the substrate and the first semiconductor pattern and a second portion interposed between the first and second semiconductor patterns. A maximum width in a second direction of the first portion is greater than a maximum width in the second direction of the second portion, and a maximum length in the second direction of the second semiconductor pattern is less than a maximum length in the second direction of the first semiconductor pattern.

公开(公告)号：US20170250184A1

公开(公告)日：2017-08-31

申请号：US15438113

申请日：2017-02-21

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sung-Dae Suk ,  Jongho Lee ,  Geumjong Bae

IPC: H01L27/092 ,  H01L29/78 ,  H01L29/417 ,  H01L23/535

CPC classification number: H01L27/0924 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823871 ,  H01L23/535 ,  H01L27/092 ,  H01L29/41791 ,  H01L29/42392 ,  H01L29/66545 ,  H01L29/7845 ,  H01L29/7848 ,  H01L29/7849 ,  H01L29/785 ,  H01L29/78696

Abstract: A semiconductor device includes an insulating layer on a substrate, a channel region on the insulating layer, a gate structure on the insulating layer, the gate structure crossing the channel region, source/drain regions on the insulating layer, the source/drain regions being spaced apart from each other with the gate structure interposed therebetween, the channel region connecting the source/drain regions to each other, and contact plugs connected to the source/drain regions, respectively. The channel region includes a plurality of semiconductor patterns that are vertically spaced apart from each other on the insulating layer, the insulating layer includes first recess regions that are adjacent to the source/drain regions, respectively, and the contact plugs include lower portions provided into the first recess regions, respectively.

公开(公告)号：US12300751B2

公开(公告)日：2025-05-13

申请号：US18124339

申请日：2023-03-21

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Junggil Yang ,  Seungmin Song ,  Geumjong Bae ,  Dong Il Bae

IPC: H01L29/78 ,  H01L29/417 ,  H01L29/423 ,  H01L29/66 ,  H01L29/786

Abstract: A semiconductor device includes a channel pattern including a first semiconductor pattern and a second semiconductor pattern, which are sequentially stacked on a substrate, and a gate electrode that extends in a first direction and crosses the channel pattern. The gate electrode includes a first portion interposed between the substrate and the first semiconductor pattern and a second portion interposed between the first and second semiconductor patterns. A maximum width in a second direction of the first portion is greater than a maximum width in the second direction of the second portion, and a maximum length in the second direction of the second semiconductor pattern is less than a maximum length in the second direction of the first semiconductor pattern.

公开(公告)号：US12255257B2

公开(公告)日：2025-03-18

申请号：US18598672

申请日：2024-03-07

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Mongsong Liang ,  Sung-Dae Suk ,  Geumjong Bae

IPC: H01L29/786 ,  H01L21/8234 ,  H01L27/088 ,  H01L29/06 ,  H01L29/16 ,  H01L29/161 ,  H01L29/165 ,  H01L29/423 ,  H01L29/66 ,  H01L29/78 ,  H10B10/00

Abstract: A semiconductor device includes a first transistor, a second transistor and a third transistor provided on a substrate, the first to third transistors respectively including source and drain regions spaced apart from each other, a gate structure extending in a first direction on the substrate and interposed between the source and drain regions, and a channel region connecting the source and drain regions to each other. A channel region of the second transistor and a channel region of the third transistor respectively include a plurality of channel portions, the plurality of channel portions spaced apart from each other in a second direction, perpendicular to an upper surface of the substrate, and connected to the source and drain regions, respectively. A width of a channel portion of the third transistor in the first direction is greater than a width of a channel portion of the second transistor in the first direction.