中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

39 records (took 0.035 seconds)

    LOCKLESS PARITY MANAGEMENT IN A DISTRIBUTED DATA STORAGE SYSTEM
    12.
    发明申请
    LOCKLESS PARITY MANAGEMENT IN A DISTRIBUTED DATA STORAGE SYSTEM 审中-公开

    公开(公告)号：US20170277450A1

    公开(公告)日：2017-09-28

    申请号：US15077420

    申请日：2016-03-22

    Applicant: Seagate Technology LLC

    Inventor： Mark Ish ,  Anant Baderdinni ,  Balakrishnan Sundararaman ,  Shashank Nemawarkar

    IPC: G06F3/06 ,  G06F12/08

    Abstract: Method and apparatus for managing data in a distributed data storage system. In some embodiments, a plurality of storage devices define an overall available memory space. A control circuit stores a first copy of user data from a selected distributed data set in a working set of memory buffers, stores a duplicate, second copy of the user data in an alias set of memory buffers, generates parity data based on the second copy of the user data in the alias set of the memory buffers, and flushes the user data and the parity data from the alias set of memory buffers to the storage devices while the first copy of the user data remains in the working set of the memory buffers. In this way, subsequently received access commands can be serviced using the working set of the memory buffers.

    HYBRID STORAGE DEVICE WITH THREE-LEVEL MEMORY MAPPING
    13.
    发明申请
    HYBRID STORAGE DEVICE WITH THREE-LEVEL MEMORY MAPPING 有权

    公开(公告)号：US20220075729A1

    公开(公告)日：2022-03-10

    申请号：US17528977

    申请日：2021-11-17

    Applicant: Seagate Technology LLC

    Inventor： Nitin Satishchandra Kabra ,  Jackson Ellis ,  Niranjan Anant Pol ,  Mark Ish

    IPC: G06F12/0873 ,  G06F12/128 ,  G06F12/02

    Abstract: A hybrid storage device with three-level memory mapping is provided. An illustrative device comprises a primary storage device comprising a plurality of primary sub-blocks; a cache memory device comprising a plurality of cache sub-blocks implemented as a cache for the primary storage device; and a controller configured to map at least one portion of one or more primary sub-blocks of the primary storage device stored in the cache to a physical location in the cache memory device using at least one table identifying portions of the primary storage device that are cached in one or more of the cache sub-blocks of the cache memory device, wherein a size of the at least one table is independent of a capacity of the primary storage device.

    Managing Multiple Namespaces in a Non-Volatile Memory (NVM)
    15.
    发明申请
    Managing Multiple Namespaces in a Non-Volatile Memory (NVM) 审中-公开

    公开(公告)号：US20180349285A1

    公开(公告)日：2018-12-06

    申请号：US15609758

    申请日：2017-05-31

    Applicant: Seagate Technology LLC

    Inventor： Mark Ish ,  Steven S. Williams ,  Jeffrey Munsil

    IPC: G06F12/10

    CPC classification number: G06F12/10 ,  G06F2212/7201

    Abstract: Apparatus and method for managing namespaces in a Non-Volatile Memory Express (NVMe) controller environment. A non-volatile memory (NVM) is arranged to store map units (MUs) as addressable data blocks in one or more namespaces. A forward map has a sequence of map unit address (MUA) entries that correlate each of the MUs with the physical locations in the NVM. The MUA entries are grouped into immediately adjacent, contiguous ranges for each of the namespaces. A base MUA array identifies the address, within the forward map, of the beginning MUA entry for each namespace. A new namespace may be added by appending a new range of the MUA entries to the forward map immediate following the last MUA entry, and by adding a new entry to the base MUA array to identify the address, within the forward map, of the beginning MUA entry for the new namespace.

    Asynchronous Discovery of Initiators and Targets in a Storage Fabric
    19.
    发明申请
    Asynchronous Discovery of Initiators and Targets in a Storage Fabric 审中-公开

    公开(公告)号：US20180081558A1

    公开(公告)日：2018-03-22

    申请号：US15709681

    申请日：2017-09-20

    Applicant: Seagate Technology LLC

    Inventor： Mark Ish ,  Siddhartha Kumar Panda ,  Dileep Kumar Sharma ,  Durga Prasad Bhattarai

    IPC: G06F3/06 ,  G06F13/40 ,  G06F13/42

    CPC classification number: G06F3/0607 ,  G06F3/0655 ,  G06F3/0688 ,  G06F13/4022 ,  G06F13/4282 ,  G06F2213/0026

    Abstract: Method and apparatus for asynchronous discovery of processing and storage nodes coupled via an expander switch in a fabric. In some embodiments, an initiator device operates as a processing node to transfer data to and from a non-volatile memory (NVM) of a target device at a storage node. One of the initiator or target devices is activated prior to the other device. The second activated device broadcasts a discovery command responsive to the activation of the second activated device and prior to receipt of a request for the discovery command from the first activated device. The first activated device processes the discovery command to establish an I/O communication link between the first activated device and the second activated device. The discovery command may include a non-volatile memory express (NVMe) controller list, and the NVM may be arranged as one or more NVMe namespaces.

    Lockless parity management in a distributed data storage system
    20.
    发明授权
    Lockless parity management in a distributed data storage system 有权

    公开(公告)号：US10564865B2

    公开(公告)日：2020-02-18

    申请号：US15077420

    申请日：2016-03-22

    Applicant: Seagate Technology LLC

    Inventor： Mark Ish ,  Anant Baderdinni ,  Balakrishnan Sundararaman ,  Shashank Nemawarkar

    IPC: G06F3/06 ,  G06F12/08 ,  G06F12/0866

    Abstract: Method and apparatus for managing data in a distributed data storage system. In some embodiments, a plurality of storage devices define an overall available memory space. A control circuit stores a first copy of user data from a selected distributed data set in a working set of memory buffers, stores a duplicate, second copy of the user data in an alias set of memory buffers, generates parity data based on the second copy of the user data in the alias set of the memory buffers, and flushes the user data and the parity data from the alias set of memory buffers to the storage devices while the first copy of the user data remains in the working set of the memory buffers. In this way, subsequently received access commands can be serviced using the working set of the memory buffers.

Patent Agency Ranking